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ST72361AR4-Auto bảng dữ liệu(PDF) 127 Page - STMicroelectronics |
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ST72361AR4-Auto bảng dữ liệu(HTML) 127 Page - STMicroelectronics |
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127 / 279 page  ST72361xx-Auto 8-bit timer (TIM8) Doc ID 12468 Rev 3 127/279 1. Reading the SR register while the TOF bit is set. 2. An access (read or write) to the CTR register. Note: The TOF bit is not cleared by accesses to ACTR register. The advantage of accessing the ACTR register rather than the CTR register is that it allows simultaneous use of the overflow function and reading the free running counter at random times (for example, to measure elapsed time) without the risk of clearing the TOF bit erroneously. The timer is not affected by WAIT mode. In HALT mode, the counter stops counting until the mode is exited. Counting then resumes from the previous count (MCU awakened by an interrupt) or from the reset count (MCU awakened by a Reset). Figure 60. Counter timing diagram, internal clock divided by 2 Figure 61. Counter timing diagram, internal clock divided by 4 Figure 62. Counter timing diagram, internal clock divided by 8 Note: The MCU is in reset state when the internal reset signal is high, when it is low the MCU is running. fCPU CLOCK FD FE FF 00 01 02 03 INTERNAL RESET TIMER CLOCK COUNTER REGISTER TIMER OVERFLOW FLAG (TOF) FC FD 00 01 fCPU CLOCK INTERNAL RESET TIMER CLOCK COUNTER REGISTER TIMER OVERFLOW FLAG (TOF) fCPU CLOCK INTERNAL RESET TIMER CLOCK COUNTER REGISTER TIMER OVERFLOW FLAG (TOF) FC FD 00 |
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