ST72344S2 datasheet(209/247 Pages) STMICROELECTRONICS

209 / 247 page

ST72344xx, ST2345xx

Electrical characteristics

Doc ID 12321 Rev 6

209/247

13.6

Clock and timing characteristics

Subject to general operating conditions for VDD, fOSC, and TA.

Figure 96.

Typical application with an external clock source

Table 95.

General timings

Symbol

Parameter (1)

Guaranteed by Design. Not tested in production.

Conditions

Min

Typ (2)

Data based on typical application software.

Max

Unit

tc(INST)

Instruction cycle time

fCPU=8 MHz

tCPU

250

375

1500

tv(IT)

Interrupt reaction time (3)

tv(IT) = Δtc(INST) + 10

Time measured between interrupt event and interrupt vector fetch. Dtc(INST) is the number of tCPU cycles

needed to finish the current instruction execution.

fCPU=8 MHz

tCPU

1.25

2.75

µs

Table 96.

External clock source

Symbol

Parameter

Conditions

Min

Max

Unit

VOSC1H

OSC1 input pin high level voltage

see Figure 96

0.7xVDD

VDD

VOSC1L

OSC1 input pin low level voltage

VSS

0.3xVDD

tw(OSC1H)

tw(OSC1L)

OSC1 high or low time (1)

Data based on design simulation and/or technology characteristics, not tested in production.

tr(OSC1)

tf(OSC1)

OSC1 rise or fall time (1)

OSCx Input leakage current

VSS ≤ VIN ≤ VDD

±1

µA

OSC1

OSC2

fOSC

EXTERNAL

ST72XXX

CLOCK SOURCE

Not connected internally

VOSC1L

VOSC1H

tr(OSC1)

tf(OSC1)

tw(OSC1H)

tw(OSC1L)

90%

10%

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