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SPC56EL54x bảng dữ liệu(PDF) 159 Page - STMicroelectronics

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SPC56ELx, SPC564Lx
Revision history
164
14-Sep-2011
7
In the “Description” section, changed the first paragraph and its bullets to
paragraph form only.
In the “Voltage regulator electrical specifications“ table, changed the CV1V2 Min
value from “—“ to 300 nF, and changed the Max value from 300 nF to 900 nF.
In the “Supply current characteristics (cut2)“ table, corrected the “IDD_LV_TYP
+ IDD_LV_PLL“ values as follows:
– Changed the maximum value for “TJ = ambient“ from “279 mA+ 
2.10 mA*fCPU“ to “279 mA”.
– Changed the maximum value for “TJ = 150 C” from “318 mA+ 
2.30 mA*fCPU” to 318 mA.
– Changed the frequency multiplier “fCPU” in the max value to read
“fCPU[MHz]” for “IDD_LV_FULL + IDD_LV_PLL” and “IDD_LV_TYP + IDD_LV_PLL”.
In the “JTAG pin AC electrical characteristics” table:
– Changed tJCYC min from 100ns to 62.5ns.
– Changed tJDC units from “ns” to “%”.
In the “Nexus debug port timing” table:
– Changed tTCYC min from 40ns to 62.5 ns.
– Changed tJOV parameter description from “TCK Low to TDO Data Valid” to
“TCK Low to TDO/RDY Data Valid“.
Changed “DDR” to “Double Data Rate (DDR)” in the “Nexus DDR Mode output
timing” figure.
Changed “TDO” to “TDO/RDY” in the “Nexus TDI, TMS, TDO timing” figure.
Removed “fmax” from the “DSPI timing” table.
Deleted “Order code” table.
Table 45. Document revision history
Date
Revision
Changes



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