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SPC56EL54x bảng dữ liệu(PDF) 128 Page - STMicroelectronics |
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SPC56EL54x bảng dữ liệu(HTML) 128 Page - STMicroelectronics |
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128 / 165 page ![]() Electrical characteristics SPC56ELx, SPC564Lx 128/165 DocID15457 Rev 12 Figure 13. Pad output delay 3.20 Reset sequence This section shows the duration for different reset sequences. It describes the different reset sequences and it specifies the start conditions and the end indication for the reset sequences. 3.20.1 Reset sequence duration Table 33 specifies the minimum and the maximum reset sequence duration for the five different reset sequences described in Section 3.20.2. 3Fast T 1 — 6— — 4 — — 72 3— 40 25 1 — 6— — 7 — — 55 7— 40 50 1 — 6 — — 12 — — 40 7 — 40 100 1 — 6 — — 18 — — 25 7 — 40 200 4 Symmetric T 1 — 8 — — 5 — — 50 3 — 25 25 1. Propagation delay from VDD_HV_IOx/2 of internal signal to Pchannel/Nchannel switch-on condition (i.e. t_PHL and t_PLH in Figure 13: Pad output delay ). 2. Slope at rising/falling edge (i.e. t_F and t_R in Figure 13: Pad output delay). 3. Data based on characterization results, not tested in production. Table 32. Pad AC specifications (3.3 V, IPP_HVE = 0)(1) (continued) No. Pad Tswitchon(1)(ns) Rise/Fall(2) (ns) Frequency (MHz) Current slew(3) (mA/ns) Load drive (pF) Min Typ Max Min Typ Max Min Typ Max Min Typ Max |
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