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TNETV2664FIDZWT bảng dữ liệu(PDF) 132 Page - Texas Instruments

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tên linh kiện TNETV2664FIDZWT
Giải thích chi tiết về linh kiện  Fixed-Point Digital Signal Processor
PDF  249 Pages
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TNETV2664FIDZWT bảng dữ liệu(HTML) 132 Page - Texas Instruments

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TMS320C6424
SPRS347D – MARCH 2007 – REVISED DECEMBER 2009
www.ti.com
6.3.4
C6424 Power and Clock Domains
The C6424 includes one single power domain — the "Always On" power domain. The "Always On" power
domain is always on when the chip is on. The "Always On" domain is powered by the CVDD pins of the
C6424. All C6424 modules lie within the "Always On" power domain. Table 6-1 provides a listing of the
C6424 clock domains.
One primary reference clock is required for the C6424 device. It can be either a crystal input or driven by
external oscillators. A 15–30-MHz crystal is recommended for the PLLs, which generate the internal clocks
for the digital signal processor (DSP), peripherals, and the EDMA3. For further description of the C6424
clock domains, see Table 6-2 and Figure 6-4.
The C6424 architecture is divided into the power and clock domains shown in Table 6-1. Table 6-2 and
Table 6-3further discuss the clock domains and their ratios. Figure 6-4 shows the clock domain block
diagram.
132
Peripheral Information and Electrical Specifications
Copyright © 2007–2009, Texas Instruments Incorporated
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