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STM32L476RG bảng dữ liệu(PDF) 181 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  Ultra-low-power ARM® Cortex®-M4 32-bit MCUFPU, 100DMIPS, up to 1MB Flash, 128 KB SRAM, USB OTG FS, LCD, analog, audio
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STM32L476RG bảng dữ liệu(HTML) 181 Page - STMicroelectronics

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STM32L476xx
Electrical characteristics
207
Figure 28. SPI timing diagram - slave mode and CPHA = 0
tv(SO)
Data output valid time
Slave mode 2.7 < VDD < 3.6 V
Voltage Range 1
-12.5
19
ns
Slave mode 1.71 < VDD < 3.6 V
Voltage Range 1
-12.5
30
Slave mode 1.71 < VDD < 3.6 V
Voltage Range 2
-12.5
33
-
Slave mode 1.08 < VDDIO2 < 1.32 V(3)
-25
62.5
tv(MO)
Master mode
-
2.5
12.5
th(SO)
Data output hold time
Slave mode
9
-
-
ns
-
Slave mode 1.08 < VDDIO2 < 1.32 V(3)
24
-
-
th(MO)
Master mode
0
-
-
1. Guaranteed by characterization results.
2. Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has to fit into SCK low or
high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a master
having tsu(MI) = 0 while Duty(SCK) = 50 %.
3. SPI mapped on Port G.
Table 83. SPI characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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