STLUX325ATR datasheet(109/126 Pages) STMICROELECTRONICS

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STLUX

Electrical characteristics

126

12.3.8

Reset pin characteristics

Subject to general operating conditions for VDD and TA unless otherwise specified.

12.3.9

I2C interface characteristics

Table 86. NRST pin characteristics

Symbol

Parameter

Conditions

Min.(1)

1. Data based on characterization results, not tested in production.

Typ.

Max.(1)

Unit

VIL(NRST) NRST input low level voltage(1)

-0.3

0.3 x VDD

VIH(NRST) NRST input high level voltage(1)

0.7 x VDD

VDD + 0.3

VOL(NRST) NRST output low level voltage(1)

IOL = 2 mA

0.5

RPU(NRST) NRST pull-up resistor(2)

2. The RPU pull-up equivalent resistor is based on a resistive transistor.



tIFP(NRST) NRST input filtered pulse(3)

3. Data guaranteed by design, not tested in production.

tINFP(NRST) NRST not input filtered pulse(3)

500

tOP(NRST) NRST output filtered pulse(3)

µs

Table 87. I2C interface characteristics

Symbol

Parameter

Standard mode

Fast mode(1)

1. fMASTER, must be at least 8 MHz to achieve maximum fast I2C speed (400 kHz).

Unit

Min.(2)

2. Data based on standard I2C protocol requirement, not tested in production.

Max.(2) Min.(2) Max.(2)

tw(SCLL)

SCL clock low time

4.7

1.3

µs

tw(SCLH)

SCL clock high time

4.0

0.6

tsu(SDA)

SDA setup time

250

100

th(SDA)

SDA data hold time

0(3)

3. The maximum hold time of the start condition has only to be met if the interface does not stretch the low

time.

0(3)

900(3)

tr(SDA) tr(SCL) SDA and SCL rise time (VDD = 3.3 to 5 V)(4)

4. I2C multifunction signals require the high sink pad configuration and the interconnection of 1 K

 pull-up

resistances.

1000

300

tf(SDA) tf(SCL) SDA and SCL fall time (VDD = 3.3 to 5 V)(4)

300

th(STA)

START condition hold time

4.0

0.6

µs

tsu(STA)

Repeated START condition setup time

4.7

0.6

tsu(STO)

STOP condition setup time

4.0

0.6

µs

tw(STO:STA) STOP to START condition time (bus free)

4.7

1.3

µs

Capacitive load for each bus line(5)

5. 50 pF is the maximum load capacitance value to meet the I2C std timing specifications.

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