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PIC16F870/SP bảng dữ liệu(PDF) 124 Page - Microchip Technology |
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PIC16F870/SP bảng dữ liệu(HTML) 124 Page - Microchip Technology |
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124 / 156 page ![]() PIC16F870/871 DS30569A-page 124 Preliminary © 1999 Microchip Technology Inc. D150* Open-Drain High Voltage VOD - - 8.5 V RA4 pin -- Capacitive Loading Specs on Output Pins D100 OSC2 pin COSC2 - - 15 pF In XT, HS and LP modes when exter- nal clock is used to drive OSC1. D101 D102 All I/O pins and OSC2 (in RC mode) SCL, SDA in I2C mode CIO CB - - - - 50 400 pF pF Data EEPROM Memory D120 Endurance ED 100K - - E/W 25 °C at 5V D121 VDD for read/write VDRW Vmin - 5.5 V Using EECON to read/write Vmin = min operating voltage D122 Erase/write cycle time TDEW -4 8 ms Program FLASH Memory D130 Endurance EP 1000 - - E/W 25 °C at 5V D131 VDD for read VPR Vmin - 5.5 V Vmin = min operating voltage D132a VDD for erase/write Vmin - 5.5 V using EECON to read/write, Vmin = min operating voltage D133 Erase/Write cycle time TPEW -4 8 ms DC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for industrial Operating voltage VDD range as described in DC spec Section 14.1 and Section 14.2. Param No. Characteristic Sym Min Typ† Max Units Conditions Legend: * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: In RC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC16F870/871 be driven with external clock in RC mode. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. 3: Negative current is defined as current sourced by the pin. |
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