PIC16LC71 datasheet(120/176 Pages) MICROCHIP

120 / 176 page

PIC16C71X

DS30272A-page 120

Applicable Devices

710 71 711 715

FIGURE 13-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, AND POWER-UP

TIMER TIMING

FIGURE 13-5: BROWN-OUT RESET TIMING

TABLE 13-4:

RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,

AND BROWN-OUT RESET REQUIREMENTS

Parameter

No.

Sym

Characteristic

Min

Typ†

Max

Units

Conditions

TmcL

MCLR Pulse Width (low)

—

µs

VDD = 5V, -40˚C to +125˚C

31*

Twdt

Watchdog Timer Time-out Period

(No Prescaler)

VDD = 5V, -40˚C to +125˚C

Tost

Oscillation Start-up Timer Period

—

1024TOSC

—

TOSC = OSC1 period

33*

Tpwrt

Power up Timer Period

132

VDD = 5V, -40˚C to +125˚C

TIOZ

I/O Hi-impedance from MCLR Low

or Watchdog Timer Reset

—

2.1

µs

TBOR

Brown-out Reset pulse width

100

—

µs

VDD

≤ BVDD (D005)

TPER

Parity Error Reset

—

TBD

—

µs

These parameters are characterized but not tested.

†

Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not

tested.

VDD

MCLR

Internal

POR

PWRT

Timeout

OSC

Timeout

Internal

RESET

Watchdog

Timer

RESET

I/O Pins

Parity

Error

Reset

VDD

BVDD

PIC16LC71 bảng dữ liệu(PDF) 120 Page - Microchip Technology

PIC16LC71 bảng dữ liệu(HTML) 120 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL