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AT90PWM2 bảng dữ liệu(PDF) 227 Page - ATMEL Corporation |
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AT90PWM2 bảng dữ liệu(HTML) 227 Page - ATMEL Corporation |
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227 / 365 page ![]() 227 4317K–AVR–03/2013 AT90PWM2/3/2B/3B 20. Analog Comparator The Analog Comparator compares the input values on the positive pin ACMPx and negative pin ACMPM. 20.1 Overview The AT90PWM2/2B/3/3B features three fast analog comparators. Each comparator has a dedicated input on the positive input, and the negative input can be con- figured as: • a steady value among the 4 internal reference levels defined by the Vref selected thanks to the REFS1:0 bits in ADMUX register. • a value generated from the internal DAC • an external analog input ACMPM. When the voltage on the positive ACMPn pin is higher than the voltage selected by the ACnM multiplexer on the negative input, the Analog Comparator output, ACnO, is set. The comparator is a clocked comparator. A new comparison is done on the falling edge of CLK I/O or CLKI/O/2 ( Depending on ACCKDIV fit of ACSR register, See “Analog Comparator Sta- tus Register – ACSR” on page 231.). Each comparator can trigger a separate interrupt, exclusive to the Analog Comparator. In addi- tion, the user can select Interrupt triggering on comparator output rise, fall or toggle. The interrupt flags can also be used to synchronize ADC or DAC conversions. Moreover, the comparator’s output of the comparator 1 can be set to trigger the Timer/Counter1 Input Capture function. A block diagram of the three comparators and their surrounding logic is shown in Figure 20-1. |
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