PIC18F242 datasheet(273/332 Pages) MICROCHIP

273 / 332 page

DS39564C-page 271

PIC18FXX2

22.3.3

TIMING DIAGRAMS AND SPECIFICATIONS

FIGURE 22-5:

EXTERNAL CLOCK TIMING (ALL MODES EXCEPT PLL)

TABLE 22-4:

EXTERNAL CLOCK TIMING REQUIREMENTS

OSC1

CLKO

Param.

No.

Symbol

Characteristic

Min

Max

Units

Conditions

FOSC

External CLKI Frequency(1)

MHz

EC, ECIO, -40

°C to +85°C

Oscillator Frequency(1)

MHz

EC, ECIO, +85

°C to +125°C

MHz

RC osc

0.1

MHz

XT osc

MHz

HS osc

MHz

HS + PLL osc, -40

°C to +85°C

6.25

MHz

HS + PLL osc, +85

°C to +125°C

200

kHz

LP Osc mode

TOSC

External CLKI Period(1)

—

EC, ECIO, -40

°C to +85°C

Oscillator Period(1)

—

EC, ECIO, +85

°C to +125°C

250

—

RC osc

250

10,000

XT osc

250

HS osc

100

250

HS + PLL osc, -40

°C to +85°C

160

250

HS + PLL osc, +85

°C to +125°C

—

μsLP osc

TCY

Instruction Cycle Time(1)

100

—

TCY = 4/FOSC, -40

°C to +85°C

160

—

TCY = 4/FOSC, +85

°C to +125°C

TosL,

TosH

External Clock in (OSC1)

High or Low Time

—

XT osc

2.5

—

μsLP osc

—

HS osc

4TosR,

TosF

External Clock in (OSC1)

Rise or Fall Time

—

XT osc

—

LP osc

—7.5

HS osc

Note 1: Instruction cycle period (TCY) equals four times the input oscillator time-base period for all configurations

except PLL. All specified values are based on characterization data for that particular oscillator type under

standard operating conditions with the device executing code. Exceeding these specified limits may result in

an unstable oscillator operation and/or higher than expected current consumption. All devices are tested to

operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock input

is used, the “max.” cycle time limit is “DC” (no clock) for all devices.

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