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STM32F407IG bảng dữ liệu(PDF) 136 Page - STMicroelectronics

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STM32F407IG bảng dữ liệu(HTML) 136 Page - STMicroelectronics

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Electrical characteristics
STM32F405xx, STM32F407xx
136/167
Doc ID 022152 Rev 2
PC Card/CompactFlash controller waveforms and timings
Figure 60 through Figure 65 represent synchronous waveforms, and Table 79 and Table 80
provide the corresponding timings. The results shown in this table are obtained with the
following FSMC configuration:
●
COM.FSMC_SetupTime = 0x04;
●
COM.FSMC_WaitSetupTime = 0x07;
●
COM.FSMC_HoldSetupTime = 0x04;
●
COM.FSMC_HiZSetupTime = 0x00;
●
ATT.FSMC_SetupTime = 0x04;
●
ATT.FSMC_WaitSetupTime = 0x07;
●
ATT.FSMC_HoldSetupTime = 0x04;
●
ATT.FSMC_HiZSetupTime = 0x00;
●
IO.FSMC_SetupTime = 0x04;
●
IO.FSMC_WaitSetupTime = 0x07;
●
IO.FSMC_HoldSetupTime = 0x04;
●
IO.FSMC_HiZSetupTime = 0x00;
●
TCLRSetupTime = 0;
●
TARSetupTime = 0.
In all timing tables, the THCLK is the HCLK clock period.
Figure 60.
PC Card/CompactFlash controller waveforms for common memory read
access
1.
FSMC_NCE4_2 remains high (inactive during 8-bit access.
FSMC_NWE
tw(NOE)
FSMC_NOE
FSMC_D[15:0]
FSMC_A[10:0]
FSMC_NCE4_2(1)
FSMC_NCE4_1
FSMC_NREG
FSMC_NIOWR
FSMC_NIORD
td(NCE4_1-NOE)
tsu(D-NOE)
th(NOE-D)
tv(NCEx-A)
td(NREG-NCEx)
td(NIORD-NCEx)
th(NCEx-AI)
th(NCEx-NREG)
th(NCEx-NIORD)
th(NCEx-NIOWR)
ai14895b



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