PIC18F4550ESOSQTP datasheet(415/430 Pages) MICROCHIP

415 / 430 page

Preliminary

DS39632D-page 413

PIC18F2455/2550/4455/4550

INDEX

A/D ................................................................................... 259

Acquisition Requirements ........................................ 264

ADCON0 Register .................................................... 259

ADCON1 Register .................................................... 259

ADCON2 Register .................................................... 259

ADRESH Register ............................................ 259, 262

ADRESL Register .................................................... 259

Analog Port Pins, Configuring .................................. 266

Associated Registers ............................................... 268

Configuring the Module ............................................ 263

Conversion Clock (TAD) ........................................... 265

Conversion Requirements ....................................... 398

Conversion Status (GO/DONE Bit) .......................... 262

Conversions ............................................................. 267

Converter Characteristics ........................................ 397

Converter Interrupt, Configuring .............................. 263

Discharge ................................................................. 267

Operation in Power-Managed Modes ...................... 266

Selecting and Configuring

Acquisition Time .............................................. 265

Special Event Trigger (CCP2) .................................. 268

Special Event Trigger (ECCP) ................................. 150

Use of the CCP2 Trigger .......................................... 268

Absolute Maximum Ratings ............................................. 361

AC (Timing) Characteristics ............................................. 378

Load Conditions for Device Timing

Specifications ................................................... 379

Parameter Symbology ............................................. 378

Temperature and Voltage Specifications ................. 379

Timing Conditions .................................................... 379

AC Characteristics

Internal RC Accuracy ............................................... 381

Access Bank

Mapping with Indexed Literal Offset Mode ................. 77

ACKSTAT ........................................................................ 227

ACKSTAT Status Flag ..................................................... 227

ADCON0 Register ............................................................ 259

GO/DONE Bit ........................................................... 262

ADCON1 Register ............................................................ 259

ADCON2 Register ............................................................ 259

ADDFSR .......................................................................... 350

ADDLW ............................................................................ 313

ADDULNK ........................................................................ 350

ADDWF ............................................................................ 313

ADDWFC ......................................................................... 314

ADRESH Register ............................................................ 259

ADRESL Register .................................................... 259, 262

Analog-to-Digital Converter. See A/D.

and BSR ............................................................................. 77

ANDLW ............................................................................ 314

ANDWF ............................................................................ 315

Assembler

MPASM Assembler .................................................. 358

Baud Rate Generator ....................................................... 223

BC .................................................................................... 315

BCF .................................................................................. 316

BF .................................................................................... 227

BF Status Flag ................................................................. 227

Block Diagrams

A/D ........................................................................... 262

Analog Input Model .................................................. 263

Baud Rate Generator .............................................. 223

Capture Mode Operation ......................................... 143

Comparator Analog Input Model .............................. 273

Comparator I/O Operating Modes ........................... 270

Comparator Output .................................................. 272

Comparator Voltage Reference ............................... 276

Comparator Voltage Reference Output

Buffer Example ................................................ 277

Compare Mode Operation ....................................... 144

Device Clock .............................................................. 24

Enhanced PWM ....................................................... 151

EUSART Receive .................................................... 251

EUSART Transmit ................................................... 248

External Power-on Reset Circuit

(Slow VDD Power-up) ........................................ 45

Fail-Safe Clock Monitor ........................................... 300

Generic I/O Port ....................................................... 111

High/Low-Voltage Detect with External Input .......... 280

MSSP (I2C Master Mode) ........................................ 221

MSSP (I2C Mode) .................................................... 202

MSSP (SPI Mode) ................................................... 193

On-Chip Reset Circuit ................................................ 43

PIC18F2455/2550 ..................................................... 10

PIC18F4455/4550 ..................................................... 11

PLL (HS Mode) .......................................................... 26

PWM Operation (Simplified) .................................... 146

Reads from Flash Program Memory ......................... 83

Single Comparator ................................................... 271

SPP Data Path ........................................................ 187

Table Read Operation ............................................... 79

Table Write Operation ............................................... 80

Table Writes to Flash Program Memory .................... 85

Timer0 in 16-Bit Mode ............................................. 126

Timer0 in 8-Bit Mode ............................................... 126

Timer1 ..................................................................... 130

Timer1 (16-Bit Read/Write Mode) ............................ 130

Timer2 ..................................................................... 136

Timer3 ..................................................................... 138

Timer3 (16-Bit Read/Write Mode) ............................ 138

USB Interrupt Logic ................................................. 177

USB Peripheral and Options ................................... 163

Watchdog Timer ...................................................... 297

BN .................................................................................... 316

BNC ................................................................................. 317

BNN ................................................................................. 317

BNOV .............................................................................. 318

BNZ ................................................................................. 318

BOR. See Brown-out Reset.

BOV ................................................................................. 321

BRA ................................................................................. 319

Break Character (12-Bit) Transmit and Receive .............. 253

BRG. See Baud Rate Generator.

Brown-out Reset (BOR) ..................................................... 46

Detecting ................................................................... 46

Disabling in Sleep Mode ............................................ 46

Software Enabled ...................................................... 46

BSF .................................................................................. 319

BTFSC ............................................................................. 320

BTFSS ............................................................................. 320

BTG ................................................................................. 321

BZ .................................................................................... 322

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