16F87 datasheet(223/228 Pages) MICROCHIP

223 / 228 page

 2005 Microchip Technology Inc.

DS30487C-page 221

PIC16F87/88

SPI Master Mode ....................................................... 91

SPI Master Mode (CKE = 0, SMP = 0) .................... 184

SPI Master Mode (CKE = 1, SMP = 1) .................... 184

SPI Slave Mode (CKE = 0) ................................ 91, 185

SPI Slave Mode (CKE = 1) ................................ 91, 185

Switching to SEC_RUN Mode ................................... 44

Synchronous Reception

(Master Mode, SREN) ..................................... 111

Synchronous Transmission ...................................... 109

Synchronous Transmission (Through TXEN) .......... 109

Time-out Sequence on Power-up (MCLR

Tied to VDD Through Pull-up Resistor) ............ 137

Time-out Sequence on Power-up (MCLR

Tied to VDD Through RC Network): Case 1 ..... 137

Time-out Sequence on Power-up (MCLR

Tied to VDD Through RC Network): Case 2 ..... 137

Timer0 and Timer1 External Clock .......................... 182

Timer1 Incrementing Edge ......................................... 73

Transition Between SEC_RUN/RC_RUN

and Primary Clock ............................................. 46

Two-Speed Start-up Mode ....................................... 143

Wake-up from Sleep via Interrupt ............................ 146

XT, HS, LP, EC and EXTRC to

RC_RUN Mode .................................................. 43

Timing Parameter Symbology .......................................... 178

Timing Requirements

A/D Conversion ........................................................ 191

AUSART Synchronous Receive .............................. 189

AUSART Synchronous Transmission ...................... 189

Capture/Compare/PWM (CCP1) .............................. 183

CLKO and I/O .......................................................... 180

External Clock .......................................................... 179

I2C Bus Data ............................................................ 188

I2C Bus Start/Stop Bits ............................................. 187

Reset, Watchdog Timer,

Oscillator Start-up Timer,

Power-up Timer and Brown-out Reset ............ 181

SPI Mode ................................................................. 186

Timer0 and Timer1 External Clock .......................... 182

TMR0 Register ............................................................. 14, 16

TMR1CS Bit ....................................................................... 72

TMR1H Register ................................................................ 14

TMR1L Register ................................................................. 14

TMR1ON Bit ...................................................................... 72

TMR2 Register ................................................................... 14

TMR2ON Bit ...................................................................... 80

TOUTPS0 Bit ..................................................................... 80

TOUTPS1 Bit ..................................................................... 80

TOUTPS2 Bit ..................................................................... 80

TOUTPS3 Bit ..................................................................... 80

TRISA Register ............................................................ 15, 51

TRISB Register ............................................................ 15, 16

Two-Speed Clock Start-up Mode ..................................... 143

Two-Speed Start-up ......................................................... 129

TXREG Register ................................................................ 14

TXSTA Register ................................................................. 15

BRGH Bit ................................................................... 97

CSRC Bit ................................................................... 97

SYNC Bit ................................................................... 97

TRMT Bit ................................................................... 97

TX9 Bit ....................................................................... 97

TX9D Bit .................................................................... 97

TXEN Bit .................................................................... 97

VDD Pin ................................................................................ 9

Voltage Reference Specifications .................................... 177

VSS Pin ................................................................................ 9

Wake-up from Sleep ................................................ 129, 146

Interrupts ................................................................. 135

MCLR Reset ............................................................ 135

WDT Reset .............................................................. 135

Wake-up Using Interrupts ................................................ 146

Watchdog Timer (WDT) ........................................... 129, 141

Associated Registers ............................................... 142

WDT Reset, Normal Operation ........................ 132, 135

WDT Reset, Sleep ........................................... 132, 135

WCOL ................................................................................ 89

WDTCON Register ............................................................ 16

Write Collision Detect Bit, WCOL ...................................... 89

WWW Address ................................................................ 223

WWW, On-Line Support ...................................................... 4

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