PIC18F2680ISPQTP datasheet(411/482 Pages) MICROCHIP

411 / 482 page

Preliminary

DS39625C-page 409

PIC18F2585/2680/4585/4680

ADDWF

ADD W to Indexed

(Indexed Literal Offset mode)

Syntax:

ADDWF

[k] {,d}

Operands:

≤ k ≤ 95

∈ [0,1]

= 0

Operation:

(W) + ((FSR2) + k)

→ dest

Status Affected: N, OV, C, DC, Z

Encoding:

0010

01d0

kkkk

Description:

The contents of W are added to the contents

of the register indicated by FSR2, offset by the

value ‘k’.

If ‘d’ is ‘0’, the result is stored in W. If ‘d’ is ‘1’,

the result is stored back in register ‘f’ (default).

Words:

Cycles:

Q Cycle Activity:

Decode

Read ‘k’

Process

Data

Write to

destination

Example:

ADDWF

[OFST] ,0

Before Instruction

17h

OFST

2Ch

FSR2

0A00h

Contents

of 0A2Ch

20h

After Instruction

37h

Contents

of 0A2Ch

20h

BSF

Bit Set Indexed

(Indexed Literal Offset mode)

Syntax:

BSF [k], b

Operands:

≤ f ≤ 95

≤ b ≤ 7

a = 0

Operation:

→ ((FSR2 + k))<b>

Status Affected:

None

Encoding:

1000

bbb0

kkkk

Description:

Bit ‘b’ of the register indicated by FSR2,

offset by the value ‘k’, is set.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

Data

Write to

destination

Example:

BSF

[FLAG_OFST], 7

Before Instruction

FLAG_OFST

0Ah

FSR2

0A00h

Contents

of 0A0Ah

55h

After Instruction

Contents

of 0A0Ah

D5h

SETF

Set Indexed

(Indexed Literal Offset mode)

Syntax:

SETF [k]

Operands:

≤ k ≤ 95

Operation:

FFh

→ ((FSR2) + k)

Status Affected:

None

Encoding:

0110

1000

kkkk

Description:

The contents of the register indicated by

FSR2, offset by ‘k’, are set to FFh.

Words:

Cycles:

Q Cycle Activity:

Decode

Read ‘k’

Process

Data

Write

Example:

SETF

[OFST]

Before Instruction

OFST

2Ch

FSR2

0A00h

Contents

of 0A2Ch

00h

After Instruction

Contents

of 0A2Ch

FFh

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