PIC18F2680ISPQTP datasheet(390/482 Pages) MICROCHIP

390 / 482 page

PIC18F2585/2680/4585/4680

DS39625C-page 388

Preliminary

MULLW

Multiply Literal with W

Syntax:

MULLW

Operands:

≤ k ≤ 255

Operation:

(W) x k

→ PRODH:PRODL

Status Affected:

None

Encoding:

0000

1101

kkkk

Description:

An unsigned multiplication is carried

out between the contents of W and the

8-bit literal ‘k’. The 16-bit result is

placed in the PRODH:PRODL register

pair. PRODH contains the high byte.

W is unchanged.

None of the Status flags are affected.

Note that neither overflow nor carry is

possible in this operation. A zero result

is possible but not detected.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

literal ‘k’

Process

Data

Write

registers

PRODH:

PRODL

Example:

MULLW

0C4h

Before Instruction

E2h

PRODH

PRODL

After Instruction

E2h

PRODH

ADh

PRODL

08h

MULWF

Multiply W with f

Syntax:

MULWF

f {,a}

Operands:

≤ f ≤ 255

∈ [0,1]

Operation:

(W) x (f)

→ PRODH:PRODL

Status Affected:

None

Encoding:

0000

001a

ffff

Description:

An unsigned multiplication is carried

out between the contents of W and the

result is stored in the PRODH:PRODL

high byte. Both W and ‘f’ are

unchanged.

None of the Status flags are affected.

Note that neither overflow nor carry is

possible in this operation. A zero

result is possible but not detected.

If ‘a’ is ‘0’, the Access Bank is

selected. If ‘a’ is ‘1’, the BSR is used

to select the GPR bank (default).

If ‘a’ is ‘0’ and the extended

instruction set is enabled, this

instruction operates in Indexed Literal

Offset Addressing mode whenever

≤ 95 (5Fh). See Section 25.2.3

“Byte-Oriented and Bit-Oriented

Instructions in Indexed Literal Offset

Mode” for details.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

Data

Write

registers

PRODH:

PRODL

Example:

MULWF

REG, 1

Before Instruction

C4h

REG

B5h

PRODH

PRODL

After Instruction

C4h

REG

B5h

PRODH

8Ah

PRODL

94h

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