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18F8680 bảng dữ liệu(PDF) 180 Page - Microchip Technology |
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18F8680 bảng dữ liệu(HTML) 180 Page - Microchip Technology |
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180 / 496 page ![]() PIC18F6585/8585/6680/8680 DS30491C-page 178 2004 Microchip Technology Inc. TABLE 16-2: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz FIGURE 16-2: SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODULE FIGURE 16-3: PWM OUTPUT RELATIONSHIPS (ACTIVE-HIGH STATE) PWM Frequency 2.44 kHz 9.77 kHz 39.06 kHz 156.25 kHz 312.50 kHz 416.67 kHz Timer Prescaler (1, 4, 16) 16 41111 PR2 Value FFh FFh FFh 3Fh 1Fh 17h Maximum Resolution (bits) 10 10 10 8 7 6.58 CCPR1L CCPR1H (Slave) Comparator TMR2 Comparator PR2 (Note 1) RQ S Duty Cycle Registers CCP1CON<5:4> Clear Timer, set CCP1 pin and latch D.C. Note 1: The 8-bit timer TMR2 register is concatenated with the 2-bit internal Q clock or 2 bits of the prescaler to create the 10-bit time base. 2: Alternate setting controlled by the ECCPMX bit (PIC18F8X8X devices only). TRISC<2> RC2/CCP1/P1A TRISE<6> RE6/AD14/P1B or RH7(2) TRISE<5> TRISG<4> RG4/P1D Output Controller P1M1<1:0> 2 CCP1M<3:0> 4 CCP1DEL CCP1/P1A P1B P1C P1D RE5/AD13/P1C or RH6(2) 0 Period 00 10 01 11 SIGNAL PR2 + 1 CCP1CON <7:6> P1A Modulated P1A Modulated P1B Modulated P1A Active P1B Inactive P1C Inactive P1D Modulated P1A Inactive P1B Modulated P1C Active P1D Inactive Duty Cycle (Single Output) (Half-Bridge) (Full-Bridge, Forward) (Full-Bridge, Reverse) Delay(1) Delay(1) Note 1: Dead-band delay is programmed using the ECCP1DEL register (Section 16.2.6 “Programmable Dead-Band Delay”). |
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