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18F8680 bảng dữ liệu(PDF) 161 Page - Microchip Technology

tên linh kiện 18F8680
Giải thích chi tiết về linh kiện  64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module
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18F8680 bảng dữ liệu(HTML) 161 Page - Microchip Technology

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 2004 Microchip Technology Inc.
DS30491C-page 159
PIC18F6585/8585/6680/8680
12.0
TIMER1 MODULE
The Timer1 module timer/counter has the following
features:
• 16-bit timer/counter
(two 8-bit registers; TMR1H and TMR1L)
• Readable and writable (both registers)
• Internal or external clock select
• Interrupt on overflow from 0FFFFh to 0000h
• Reset from CCP module special event trigger
Figure 12-1 is a simplified block diagram of the Timer1
module.
Register 12-1 details the Timer1 Control register. This
register controls the operating mode of the Timer1
module and contains the Timer1 Oscillator Enable bit
(T1OSCEN). Timer1 can be enabled or disabled by
setting or clearing control bit, TMR1ON (T1CON<0>).
REGISTER 12-1:
T1CON: TIMER1 CONTROL REGISTER
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
RD16
—
T1CKPS1
T1CKPS0
T1OSCEN
T1SYNC
TMR1CS
TMR1ON
bit 7
bit 0
bit 7
RD16: 16-bit Read/Write Mode Enable bit
1
= Enables register read/write of Timer1 in one 16-bit operation
0
= Enables register read/write of Timer1 in two 8-bit operations
bit 6
Unimplemented: Read as ‘0’
bit 5-4
T1CKPS1:T1CKPS0: Timer1 Input Clock Prescale Select bits
11
= 1:8 prescale value
10
= 1:4 prescale value
01
= 1:2 prescale value
00
= 1:1 prescale value
bit 3
T1OSCEN: Timer1 Oscillator Enable bit
1
= Timer1 oscillator is enabled
0
= Timer1 oscillator is shut-off
The oscillator inverter and feedback resistor are turned off to eliminate power drain.
bit 2
T1SYNC: Timer1 External Clock Input Synchronization Select bit
When TMR1CS = 1:
1
= Do not synchronize external clock input
0
= Synchronize external clock input
When TMR1CS = 0:
This bit is ignored. Timer1 uses the internal clock when TMR1CS = 0.
bit 1
TMR1CS: Timer1 Clock Source Select bit
1
= External clock from pin RC0/T1OSO/T13CKI (on the rising edge)
0
= Internal clock (FOSC/4)
bit 0
TMR1ON: Timer1 On bit
1
= Enables Timer1
0
= Stops Timer1
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown



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