DM3725CBC datasheet(258/280 Pages) TI

258 / 280 page

DM3730, DM3725

SPRS685D

– AUGUST 2010 – REVISED JULY 2011

www.ti.com

Table 6-126. MMC2 and MMC3 Interfaces Switching Characteristics

—SDIO Identification Mode(4)(7)(7)

NO.

PARAMETER

OPP100

OPP50

UNIT

MIN

MAX

MIN

MAX

Standard SDIO Mode

SD1

tc(clk)

Frequency(1), output clock period

0.4

MHz

SD2

tW(clkH)

Typical pulse duration, output clock high

X(5) *

PO(2)

SD2

tW(clkL)

Typical pulse duration, output clock low

Y(6) *

PO(2)

tdc(clk)

Duty cycle error, output clock

125

tJ(clk)

Jitter standard deviation(3), output clock

200

tR(clk)

Rise time, output clock

tF(clk)

Fall time, output clock

tR(data)

Rise time, output data

tF(data)

Fall time, output data

SD5

td(CLKOH-CMD)

Delay time, mmcx_clk rising clock edge to

6.3

2492.7

6.3

77.03

mmcx_cmd transition

(1) Related to the output mmcx_clk maximum and minimum frequency.

(2) P = output mmcx_clk period in ns

(3) The jitter probability density can be approximated by a Gaussian function.

(4) Corresponding figures showing timing parameters are common with other interface modes (see SDIO, HS SDIO modes).

(5) The X parameter is defined as follows:

CLKD

1 or Even

0.5

Odd

(trunk[CLKD/2]+1)/CLKD

All required details about clock division factor CLKD can be found in the AM/DM37x Multimedia Device Technical Reference Manual

(literature number SPRUGN4).

(6) The Y parameter is defined as follows:

CLKD

1 or Even

0.5

Odd

(trunk[CLKD/2])/CLKD

All required details about clock division factor CLKD can be found in the AM/DM37x Multimedia Device Technical Reference Manual

(literature number SPRUGN4).

(7) In mmcx, x is equal to 2 or 3.

6.6.8.1.7 MMC2 and MMC3 Interfaces

—High-Speed SDIO Mode

Table 6-128 and Table 6-129 assume testing over the recommended operating conditions and electrical

characteristic conditions below (see Figure 6-73 and Figure 6-74).

Table 6-127. MMC2 and MMC3 Interfaces Timing Conditions

—High-Speed SDIO Mode

TIMING CONDITION PARAMETER

VALUE

UNIT

MIN

MAX

Input Conditions

Input signal rise time

0.18

5.69

Input signal fall time

0.19

5.70

Output Condition

CLOAD

Output load capacitance(1)

258

Timing Requirements and Switching Characteristics

Submit Documentation Feedback

Product Folder Link(s): DM3730 DM3725

DM3725CBC bảng dữ liệu(PDF) 258 Page - Texas Instruments

DM3725CBC bảng dữ liệu(HTML) 258 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL