DSPIC33FJ06GS101TESLASHML datasheet(201/346 Pages) MICROCHIP

201 / 346 page

Preliminary

DS70318D-page 199

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04

FIGURE 15-2:

PARTITIONED OUTPUT PAIR, COMPLEMENTARY PWM MODE

15.3

Control Registers

The following registers control the operation of the

high-speed PWM module.

• PTCON: PWM Time Base Control Register

• PTCON2: PWM Clock Divider Select Register

• PTPER: PWM Master Time Base Register(1)

• SEVTCMP: PWM Special Event Compare

• MDC: PWM Master Duty Cycle Register

• PWMCONx: PWMx Control Register

• PDCx: PWMx Generator Duty Cycle Register

• PHASEx: PWMx Primary Phase Shift Register

(PHASEx Register provides the local time base

period for PWMxH)

• DTRx: PWMx Dead-Time Register

• ALTDTRx: PWMx Alternate Dead-Time Register

• SDCx: PWMx Secondary Duty Cycle Register

• SPHASEx: PWMx Secondary Phase Shift

PWMxL)

• TRGCONx: PWMx Trigger Control Register

• IOCONx: PWMx I/O Control Register

• FCLCONx: PWMx Fault Current-Limit Control

• TRIGx: PWMx Primary Trigger Compare Value

• STRIGx: PWMx Secondary Trigger Compare

Value Register

• LEBCONx: Leading-Edge Blanking Control

• PWMCAPx: Primary PWMx Time Base Capture

PWM Duty Cycle Register

Duty Cycle Comparator

Fault Override Values

Channel Override Values

Fault Pin Assignment Logic

Fault Pin

PWMXH

PWMXL

TMR < PDC

PWM

Override

Logic

Dead-Time

Logic

Fault Active

Phase Offset

Timer/Counter

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