AM3703CUS datasheet(113/280 Pages) TI

113 / 280 page

AM3715, AM3703

www.ti.com

SPRS616F

– JUNE 2010 – REVISED AUGUST 2011

Table 2-25. Power Supplies Signals Description(1) (continued)

SIGNAL NAME [1]

DESCRIPTION [2]

BALL BOTTOM

BALL TOP

BALL BOTTOM

BALL TOP

BALL BOTTOM

(CBP Pkg.) [4]

(CBP Pkg.) (2)[5]

(CBC Pkg.) [4]

(CBC Pkg.) (2)[5]

(CUS Pkg.) (2) [4]

vss

Ground

AG2 / U2 / B2 /

H2 / B18 / AB5 /

G1/ K1/ R1/ W1/ B2/

C1/ F1/ H2/ M2/ R2/

V16/ V15/ U16/

AG3 / W3 / P3 /

AB14 / AB20 / P2 /

H4/ N4/ R4/ W4/ AB5/

Y6/AA7/ Y11/ AA16/

U15/ U14/ U11/

J3 / E3 / A3 / P4

F22 / E2 / C22 / B4 /

A6/ D7/ Y7/AE7/ A8/

W20/P20/ L21/ H20/

U9/T16/ T15/ T14/

/ E4 / AG6 / D7 /

B7 / B10 / B15

G8/ D10/ G10/ L10/

F20/ B14/A13/ A7

T13/ T12/ T11/ T10/

C7 / V9 / U9 / P9

N10/ Y10/ AC10/

T9/ R15/ R14/ R11/

/ N9 / K9 / W10 /

C12/ D12/A13/ D14/

R10/ P17/ P15/ P14/

V10 / P10 / K10 /

AD14/ K15/ Y16/ L17/

P13/P12/ P11/ P10/

D10 / C10 /

N17/ R17/ D18/

P8/ N16/ N15/ N14/

AF12 / AE12 /

D20/G20/ E22/ AB22/

N13/ N12/ N11/

Y12 / K12 / J12 /

G23/ L23/ T23/ W23/

N10/ N9/ M16/ M13/

Y13 / W13 / J13 /

B25/ K25/U25/ AD25 /

M11/ M10/ M9/ L17/

D13 / C13 / W14

Y26

L13/ L10/ L8/ K15/

/ K16 / J16 / W17

K14/ K11/ K10/ J16/

/ K17 / J17 / W19

J15/ J14/ J13/ J12/

/ V19 / R19 / P19

J11/H16/ H14/ H11

/ L19 / K19 / D19

/ C19 / AF20 /

AE20 / T20 / R20

/ M20 / L20 / D21

/ C22 / AC25 /

Y25 / W25 /

AC26 / R26 / L26

/ A26 / G27 / B27

vdds_sram

SRAM LDOs

W16

U12

AA12

vdds_mmc1

Input power for

K25

N23

N24

MMC1 dual voltage

buffers

vdds_x

Power supply for

P25

P23

dual voltage GPIOs

vss

Ground

M28

L19

vdds

IO power plane

AG20

AD18

vss

Ground

AG16

AC16

vdds

IO power plane

H28

L20

cap_vdd_sram_mpu_i

Decoupling

capacitor for SRAM

in processor

domains

cap_vdd_sram_core

Decoupling

L21

K20

H17

capacitor for CORE

domain (SRAM)

vdds

IO power plane

AG21

AD19

cap_vddu_array

Decoupling

AH20

AE19

N20

capacitor for

WKUP/EMU

domains (array)

vss

Ground

AH21

AC19

cap_vdd_bb_mpu_iva

Decoupling

N21

capacitor for

processor domains

(bb)

sys_xtalgnd

Kelvin ground

Y17

AF23

W15

(1) NA in this table stands for "Not applicable".

(2) For a list of pins not supported on a particular package, see Table 2-4.

TERMINAL DESCRIPTION

113

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