OMAP3530ECBBA datasheet(180/264 Pages) TI1

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OFFSET

RecommendedLPDDRDevice

Orientation

OFFSET

LPDDR

Device

OMAP

6.4.2.4 LPDDR Keep Out Region

OMAP3530/25 Applications Processor

SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009

www.ti.com

Figure 6-19. OMAP35x and LPDDR Device Placement

Table 6-16. Placement Specifications

NO.

PARAMETER

MIN

MAX

UNIT

NOTES

1440

Mils

See Notes(1), (2)

1030

Mils

See Notes(1), (2)

Y Offset

525

Mils

See Notes(1),(2),(3)

LPDDR Keepout Region

See Note(4)

Clearance from non-LPDDR signal to LPDDR

See Note(5)

Keepout Region

(1)

See Figure 6-17 for dimension definitions.

(2)

Measurements from center of device to center of LPDDR device.

(3)

For 16 bit memory systems it is recommended that Y Offset be as small as possible.

(4)

LPDDR keepout region to encompass entire LPDDR routing area.

(5)

Non-LPDDR signals allowed within LPDDR keepout region provided they are separated from LPDDR routing layers by a ground plane.

The region of the PCB used for the LPDDR circuitry must be isolated from other signals. The LPDDR

keep out region is defined for this purpose and is shown in Figure 6-20. The size of this region varies with

the placement and LPDDR routing. Additional clearances required for the keep out region are shown in

Table 6-16.

180

TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS

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