HT85F2270 datasheet(178/226 Pages) HOLTEK

178 / 226 page

Rev. 1.00

178 of ��6

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Standard 8051 8-Bit Flash MCU

HT85F2260/HT85F2270/HT85F2280

I2C Registers

There are three control registers associated with the I2C bus, I2CCON, I2CADR and I2CSTA and

one data register, I2CDAT. The I2CDAT register is used to store the data being transmitted and

received on the I2C bus. Before the microcontroller writes data to the I2C bus, the actual data to be

transmitted must be placed in the I2CDAT register. After the data is received from the I2C bus, the

microcontroller can read it from the I2CDAT register. Any transmission or reception of data from

the I2C bus must be made via the I2CDAT register. The I2CADR register holds the address of the

device slave interface. This address is used by an external device when attempting to access it via

I2C bus. The complete I2C interface operation is controlled by the I2CCON register. The I2CLK

I2CSTA register.

I2C Register List

Name

Bit

I�CCON

—

ENS1

STA

STO

—

I�CLK

I�CLK.7

I�CLK.6

I�CLK.�

I�CLK.4

I�CLK.�

I�CLK.1

I�CLK.0

I�CSTA

IICS7

IICS6

IICS�

IICS4

IICS�

—

I�CDAT

D�

I�CADR

IICA6

IICA�

IICA4

IICA�

IICA1

IICA0

I2CCON Register

SFR Address: D8h

Bit

Name

—

ENS1

STA

STO

—

R/W

—

R/W

—

POR

—

Bit 7

Unimplemented, read as “0”

Bit 6

ENS1: I2C Enable Control

0: Disable

1: Enable

When the ENS1 bit is cleared to zero, the I2C interface will be disabled and will become

high impedance and not affect the original pin-shared I/O pin function. When the ENS1

bit is set high, the I2C function is enabled and care should be taken regarding the related

pin-shared I/O structure settings, such as disabling any internal pull up functions and

any other circuits connected to these pins.

Bit 5

STA: I2C Start flag

0: No START condition on the I2C bus

1: START condition

When the STA bit is set high, the master device will check the I2C bus status first and if

the bus is free a START condition will be generated.

Bit 4

STO: I2C Stop flag

0: No STOP condition on the I2C bus

1: Set STOP condition

When the STO bit is set high, the master device will transmit a STOP condition to the

I2C bus.

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