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HT85F2270 bảng dữ liệu(PDF) 142 Page - Holtek Semiconductor Inc

tên linh kiện HT85F2270
Giải thích chi tiết về linh kiện  Standard 8051 8-Bit Flash MCU
PDF  226 Pages
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nhà sản xuất  HOLTEK [Holtek Semiconductor Inc]
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Rev. 1.00
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Standard 8051 8-Bit Flash MCU
HT85F2260/HT85F2270/HT85F2280
Timer 2 with PCA
Time 2 and 4-channel PCA modules provide the Compare, Reload, Capture and programmable
clock output functions. Each of the four Timer 2 Modules contains a pair of registers, CRCL/CRCH
for Module 0 and CCLn/CCHn for Modules 1, 2 and 3. These registers are compared with the
Timer 2 TL2/TH2 register pair and when a compare match occurs, an interrupt signal can be
generated. The value in the Timer 2 registers increases by one each time an internal clock pulse is
received or an external transition occurs on the external timer pin.
The Compare function provides two modes, Mode 0 and Mode 1. When a compare match takes
place, the compare results will output to the respective output pins, according to the selected mode.
Refer Compare mode section for details.
There are two modes for the Capture function, Mode 0 and Mode 1, which are used to select
different trigger methods. In Mode 0, the Capture function is triggered by the external I/O pins,
CCn. In Mode 1, the Capture function is triggered by writing data to the CCLn or CRCL registers.
Once the Capture function is enabled and triggered, the Timer 2 data in the TL2 and TH2 registers
will be captured into the respective CCLn/CCHn or CRCL/CRCH registers. Refer Capture modes
for details.
In the Reload mode, the timer counter registers, TH2 and TL2, are located in the Special Function
Registers and is the place where the actual timer value is stored. The value in the timer registers
increases by one each time an internal clock pulse is received or an external transition occurs on
the external timer pin. The timer will count from the initial value loaded by the preload register to
the full count of FFFFH for the 16-bit Timer/Event Counters, at which point the timer overflows
and an internal interrupt signal is generated. There are two modes to reload the CRC register data,
one is the counter overflow and the other is triggered by the falling edge on the T2EX pin. Refer
Reload mode for details.
In the Programmable Clock Output mode, the clock output frequency depends on the system
clock and the reload value of the Timer 2 capture registers, CRCH and CRCL. The output clock
is generated by programming the T2CON control bit, and output via T2 pin. Refer Programmable
Clock Output mode for details.



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