HT85F2270 datasheet(136/226 Pages) HOLTEK

136 / 226 page

Rev. 1.00

1�6 of ��6

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Standard 8051 8-Bit Flash MCU

HT85F2260/HT85F2270/HT85F2280

Mode 0 – 13-bit Counter/Timer Mode Operation

To select this mode, bits TnM1 and TnM0, should be set to “00”. The 13 bits of data are comprised

of 5 low bits in the TLn register and 8 high bits in the THn register. The C/Tn bit is used to select

the timer or counter function. The Counter/Timer Run or Stop operation is controlled using the TRn

bit. If the Counter function is selected, the TRn and GATEn bits can be used to manage the external

INTn input to count edge transitions or measure pulse widths. The timer/counter clock source is

decided by the TnPRE0 and TnPRE1 bits in the TMPRE register. Note that the TRn bit is used to

control the Timer/Counter run or stop function. Clearing this bit will not clear the TLn and THn

registers, the registers should be initialised by the application program. When an overflow occurs,

the TFn interrupt request flag will be set and an interrupt will take place if the interrupt is enabled.

13-bit Counter Data

Bit

THn

D1�

D11

D10

D�

TLn

—

D�

Note: n=1� ��

Mode 1 – 16-bit Counter/Timer Mode Operation

To select this mode, bits TnM1 and TnM0, should be set to “01” respectively. The 16 bits of data are

stored in the TLn and THn registers. The C/Tn bit is used to select the timer or counter function.

The Counter/Timer Run or Stop is controlled by TRn bit. If the Counter function is selected, the

TRn and GATEn bits can be used to manage the external INTn input to count edge transitions

or measure pulse widths. The timer/counter clock source is decided by the TnPRE0 and TnPRE1

bits in the TMPRE register. Note that the TRn bit is used to control the Timer/Counter run or

stop function. Clearing this bit will not clear the TLn and THn registers, the registers should

be initialised by the application program. When an overflow occurs, the TFn interrupt request

flags will be set and an interrupt will take place if the interrupt is enabled. The following block

illustrates the 13-bit and 16-bit Timer/Counter basic operational blocks.

fSYS

TRn

GATEn

INTn

fSYS/4

fSYS

fSYS/6

fSYS/1�

TnPRE[1:0]

Tn�1/Tn�0 = 00

D�

TLn

D�

D10

D11

D1�

THn

D�

TLn

D�

D10

D11

D1�

THn

�ode 0

Tn�1/Tn�0 = 01

D�

TLn

D10

D11

D1�

D14

D1�

THn

D�

TLn

D10

D11

D1�

D14

D1�

THn

�ode 1

Interrupt

TFn flag

C/Tn=0

C/Tn=1

�UX

Mode 0 and Mode 1 Block Diagram – Timer 0, 1, 3

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