dsPIC33FJ64GS406 datasheet(117/456 Pages) MICROCHIP

117 / 456 page

 2009-2012 Microchip Technology Inc.

DS70591E-page 117

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610

6.1

System Reset

The

dsPIC33FJ32GS406/606/608/610

and

dsPIC33FJ64GS406/606/608/610 families of devices

have two types of Reset:

• Cold Reset

• Warm Reset

A Cold Reset is the result of a Power-on Reset (POR)

or a Brown-out Reset (BOR). On a Cold Reset, the

FNOSCx Configuration bits in the FOSC Configuration

A Warm Reset is the result of all the other Reset

sources, including the RESET instruction. On Warm

Reset, the device will continue to operate from the

current clock source as indicated by the Current

Oscillator Selection (COSC<2:0>) bits in the Oscillator

Control (OSCCON<14:12>) register.

The device is kept in a Reset state until the system

power supplies have stabilized at appropriate levels

and the oscillator clock is ready. The sequence in

which this occurs is described in Figure 6-2.

TABLE 6-1:

OSCILLATOR DELAY

Oscillator Mode

Oscillator

Start-up Delay

Oscillator

Start-up Timer

PLL Lock Time

Total Delay

FRC, FRCDIV16, FRCDIVN

TOSCD(1)

——

TOSCD(1)

FRCPLL

TOSCD(1)

—TLOCK(3)

TOSCD + TLOCK(1,3)

TOSCD(1)

TOST(2)

—TOSCD + TOST(1,2)

TOSCD(1)

TOST(2)

—TOSCD + TOST(1,2)

———

—

XTPLL

TOSCD(1)

TOST(2)

TLOCK(3)

TOSCD + TOST +

TLOCK(1,2,3)

HSPLL

TOSCD(1)

TOST(2)

TLOCK(3)

TOSCD + TOST +

TLOCK(1,2,3)

ECPLL

—

TLOCK(3)

LPRC

TOSCD(1)

——

TOSCD(1)

Note 1: TOSCD = Oscillator start-up delay (1.1

s max. for FRC, 70 s max. for LPRC). Crystal oscillator start-up

times vary with crystal characteristics, load capacitance, etc.

2: TOST = Oscillator Start-up Timer (OST) delay (1024 oscillator clock period). For example, TOST = 102.4

s

for a 10 MHz crystal and TOST = 32 ms for a 32 kHz crystal.

3: TLOCK = PLL lock time (1.5 ms nominal) if PLL is enabled.

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