INTEDG datasheet(296/478 Pages) MICROCHIP

296 / 478 page

PIC16(L)F1946/47

DS41414D-page 296

 2010-2012 Microchip Technology Inc.

SSPxMSK: SSPx MASK REGISTER

R/W-1/1

MSK<7:0>

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7-1

MSK<7:1>:

Mask bits

1 = The received address bit n is compared to SSPxADD<n> to detect I2C address match

0 = The received address bit n is not used to detect I2C address match

bit 0

MSK<0>:

Mask bit for I2C Slave mode, 10-bit Address

I2C Slave mode, 10-bit address (SSPM<3:0> = 0111 or 1111):

1 = The received address bit 0 is compared to SSPxADD<0> to detect I2C address match

0 = The received address bit 0 is not used to detect I2C address match

I2C Slave mode, 7-bit address, the bit is ignored

SSPxADD: MSSPx ADDRESS AND BAUD RATE REGISTER (I2C MODE)

R/W-0/0

ADD<7:0>

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

Master mode:

bit 7-0

ADD<7:0>:

Baud Rate Clock Divider bits

SCLx pin clock period = ((ADD<7:0> + 1) *4)/FOSC

10-Bit Slave mode – Most Significant Address byte:

bit 7-3

Not used:

Unused for Most Significant Address byte. Bit state of this register is a “don’t care”. Bit

pattern sent by master is fixed by I2C specification and must be equal to ‘11110’. However, those bits

are compared by hardware and are not affected by the value in this register.

bit 2-1

ADD<2:1>:

Two Most Significant bits of 10-bit address

bit 0

Not used:

Unused in this mode. Bit state is a “don’t care”.

10-Bit Slave mode – Least Significant Address byte:

bit 7-0

ADD<7:0>:

Eight Least Significant bits of 10-bit address

7-Bit Slave mode:

bit 7-1

ADD<7:1>:

7-bit address

bit 0

Not used:

Unused in this mode. Bit state is a “don’t care”.

INTEDG bảng dữ liệu(PDF) 296 Page - Microchip Technology

INTEDG bảng dữ liệu(HTML) 296 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL