STM32F415OG datasheet(136/186 Pages) STMICROELECTRONICS

136 / 186 page

Electrical characteristics

STM32F415xx, STM32F417xx

136/186

DocID022063 Rev 4

5.3.23

Embedded reference voltage

The parameters given in Table 72 are derived from tests performed under ambient

temperature and VDD supply voltage conditions summarized in Table 14.

5.3.24

DAC electrical characteristics

Table 72. Embedded internal reference voltage

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VREFINT

Internal reference voltage

–40 °C < TA < +105 °C 1.18 1.21

1.24

TS_vrefint(1)

ADC sampling time when reading the

internal reference voltage

µs

VRERINT_s(2)

Internal reference voltage spread over the

temperature range

VDD = 3 V

TCoeff(2)

Temperature coefficient

ppm/°C

tSTART(2)

Startup time

µs

1. Shortest sampling time can be determined in the application by multiple iterations.

2. Guaranteed by design, not tested in production.

Table 73. Internal reference voltage calibration values

Symbol

Parameter

Memory address

VREFIN_CAL

Raw data acquired at temperature of 30 °C, VDDA=3.3 V

0x1FFF 7A2A - 0x1FFF 7A2B

Table 74. DAC characteristics

Symbol

Parameter

Min

Typ

Max

Unit

Comments

VDDA

Analog supply voltage

1.8(1)

-3.6

VREF+

Reference supply voltage

1.8(1)

-3.6

VREF+ ≤ VDDA

VSSA

Ground

RLOAD(2)

Resistive load with buffer

RO(2)

Impedance output with

buffer OFF

When the buffer is OFF, the

Minimum resistive load between

DAC_OUT and VSS to have a 1%

accuracy is 1.5 M

CLOAD(2)

Capacitive load

Maximum capacitive load at

DAC_OUT pin (when the buffer is

ON).

DAC_OUT

min(2)

Lower DAC_OUT voltage

with buffer ON

0.2

It gives the maximum output

excursion of the DAC.

It corresponds to 12-bit input code

(0x0E0) to (0xF1C) at VREF+ =

3.6 V and (0x1C7) to (0xE38) at

VREF+ = 1.8 V

DAC_OUT

max(2)

Higher DAC_OUT voltage

with buffer ON

VDDA – 0.2

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