công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

STM32F407IG bảng dữ liệu(PDF) 115 Page - STMicroelectronics

tên linh kiện STM32F407IG
Giải thích chi tiết về linh kiện  ARM Cortex-M4 32b MCUFPU, 210DMIPS, up to 1MB Flash/1924KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera
PDF  167 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F407IG bảng dữ liệu(HTML) 115 Page - STMicroelectronics

Back Button STM32F407IG Datasheet HTML 111Page - STMicroelectronics STM32F407IG Datasheet HTML 112Page - STMicroelectronics STM32F407IG Datasheet HTML 113Page - STMicroelectronics STM32F407IG Datasheet HTML 114Page - STMicroelectronics STM32F407IG Datasheet HTML 115Page - STMicroelectronics STM32F407IG Datasheet HTML 116Page - STMicroelectronics STM32F407IG Datasheet HTML 117Page - STMicroelectronics STM32F407IG Datasheet HTML 118Page - STMicroelectronics STM32F407IG Datasheet HTML 119Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 115 / 167 page
background image
STM32F405xx, STM32F407xx
Electrical characteristics
Doc ID 022152 Rev 2
115/167
USB HS characteristics
Table 58 shows the USB HS operating voltage.
Figure 43.
ULPI timing diagram
Table 58.
USB HS DC electrical characteristics
Symbol
Parameter
Min.(1)
1.
All the voltages are measured from the local ground potential.
Max.(1)
Unit
Input level
VDD
Ethernet operating voltage
2.7
3.6
V
Table 59.
USB HS clock timing parameters(1)
1.
Guaranteed by design, not tested in production.
Parameter
Symbol
Min
Nominal
Max
Unit
fHCLK value to guarantee proper operation of
USB HS interface
30
MHz
Frequency (first transition)
8-bit ±10%
FSTART_8BIT
54
60
66
MHz
Frequency (steady state) ±500 ppm
FSTEADY
59.97
60
60.03
MHz
Duty cycle (first transition)
8-bit ±10%
DSTART_8BIT
40
50
60
%
Duty cycle (steady state) ±500 ppm
DSTEADY
49.975
50
50.025
%
Time to reach the steady state frequency and
duty cycle after the first transition
TSTEADY
--
1.4
ms
Clock startup time after the
de-assertion of SuspendM
Peripheral
TSTART_DEV
--
5.6
ms
Host
TSTART_HOST
--
-
PHY preparation time after the first transition
of the input clock
TPREP
--
-
µs



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com