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WM8326 bảng dữ liệu(PDF) 101 Page - Wolfson Microelectronics plc

tên linh kiện WM8326
Giải thích chi tiết về linh kiện  Processor Power Management Subsystem
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Production Data
WM8326
w
PD, June 2012, Rev 4.0
101
18.4 DIGITAL COMPARATORS
The WM8326 has four digital comparators which may be used to compare AUXADC measurement
data against programmable threshold values. Each comparator has a status bit, and also an
associated interrupt flag (described in Section 18.5), which indicates that the associated data is
beyond the threshold value.
The digital comparators are enabled using the DCMPn_ENA register bits as described in Table 45.
After an AUXADC conversion, the measured value is compared with the threshold level of any
associated comparator(s). Note that this comparison is only performed following a conversion.
The source data for each comparator is selected using the DCMPn_SRC register bits; this selects
one of the AUXADC channels for each comparator. If required, the same AUXADC channel may be
selected for more than one comparator; this would allow more than one threshold to be monitored on
the same AUXADC channel. Note that the Backup Battery voltage input can only be monitored using
DCMP4.
The DCMPn_GT register bits select whether the status bit and associated interrupt flag will be
asserted when the measured value is above the threshold or when the measured value is below the
threshold. The output of the most recent threshold comparison is indicated in the DCOMPn_STS
fields.
The threshold DCMPn_THR is a 12-bit code for each comparator. This field follows the same voltage
or temperature coding as the associated AUXADC channel source (see Section 18.3).
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R16432 (4030h)
Comparator
Control
11
DCOMP4_STS
0
Digital Comparator 4 status
0 = Comparator 4 threshold not
detected
1 = Comparator 4 threshold detected
(Trigger is controlled by DCMP4_GT)
10
DCOMP3_STS
0
Digital Comparator 3 status
0 = Comparator 3 threshold not
detected
1 = Comparator 3 threshold detected
(Trigger is controlled by DCMP3_GT)
9
DCOMP2_STS
0
Digital Comparator 2 status
0 = Comparator 2 threshold not
detected
1 = Comparator 2 threshold detected
(Trigger is controlled by DCMP2_GT)
8
DCOMP1_STS
0
Digital Comparator 1 status
0 = Comparator 1 threshold not
detected
1 = Comparator 1 threshold detected
(Trigger is controlled by DCMP1_GT)
3
DCMP4_ENA
0
Digital Comparator 4 Enable
0 = Disabled
1 = Enabled
2
DCMP3_ENA
0
Digital Comparator 3 Enable
0 = Disabled
1 = Enabled
1
DCMP2_ENA
0
Digital Comparator 2 Enable
0 = Disabled
1 = Enabled
0
DCMP1_ENA
0
Digital Comparator 1 Enable
0 = Disabled
1 = Enabled
R16433 (4031h)
Comparator 1
15:13
DCMP1_SRC
[2:0]
000
Digital Comparator 1 source select
0 = Reserved



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