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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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PIC16F1526 bảng dữ liệu(PDF) 130 Page - Microchip Technology |
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PIC16F1526 bảng dữ liệu(HTML) 130 Page - Microchip Technology |
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130 / 354 page  PIC16(L)F1526/27 DS41458A-page 130 Preliminary 2011 Microchip Technology Inc. TABLE 12-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD REGISTER 12-17: ANSELD: PORTD ANALOG SELECT REGISTER U-0 U-0 U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1 — — — — ANSD3 ANSD2 ANSD1 ANSD0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-4 Unimplemented : Read as ‘0’ bit 3-0 ANSD<3:0> : Analog Select between Analog or Digital Function on pins RD<3:0>, respectively 0 = Digital I/O. Pin is assigned to port or digital special function. 1 = Analog input. Pin is assigned as analog input(1). Digital input buffer disabled. Note 1: When setting a pin to an analog input, the corresponding TRIS bit must be set to Input mode in order to allow external control of the voltage on the pin. REGISTER 12-18: WPUD: WEAK PULL-UP PORTD REGISTER R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 WPUD7 WPUD6 WPUD5 WPUD4 WPUD3 WPUD2 WPUD1 WPUD0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-0 WPUD<7:0> : Weak Pull-up Register bits 1 = Pull-up enabled 0 = Pull-up disabled Note 1: Global WPUEN bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled. 2: The weak pull-up device is automatically disabled if the pin is in configured as an output. Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page ANSELD — — — — ANSD3 ANSD2 ANSD1 ANSD0 124 LATD LATD7 LATD6 LATD5 LATD4 LATD3 LATD2 LATD1 LATD0 123 PORTD RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0 123 TRISD TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0 123 WPUD WPUD7 WPUD6 WPUD5 WPUD4 WPUD3 WPUD2 WPUD1 WPUD0 130 Legend: x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by PORTD. |
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