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PIC18F23K22-E/ML bảng dữ liệu(PDF) 169 Page - Microchip Technology

tên linh kiện PIC18F23K22-E/ML
Giải thích chi tiết về linh kiện  28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
PDF  496 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F23K22-E/ML bảng dữ liệu(HTML) 169 Page - Microchip Technology

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 2010 Microchip Technology Inc.
Preliminary
DS41412C-page 169
PIC18(L)F2X/4XK22
FIGURE 12-7:
TIMER1/3/5 GATE SINGLE-PULSE AND TOGGLE COMBINED MODE
12.12 Peripheral Module Disable
When a peripheral module is not used or inactive, the
module can be disabled by setting the Module Disable
bit in the PMD registers. This will reduce power con-
sumption to an absolute minimum. Setting the PMD
bits holds the module in Reset and disconnects the
module’s clock source. The Module Disable bits for
Timer1 (TMR1MD), Timer3 (TMR3MD) and Timer5
(TMR5MD) are in the PMD0 Register. See Section 3.0
“Power-Managed Modes” for more information.
TMRxGE
TxGPOL
TxG_IN
TxCKI
TxGVAL
TIMER1/3/5
NN + 1
N + 2
TxGSPM
TxGGO/
DONE
Set by software
Cleared by hardware on
falling edge of TxGVAL
Set by hardware on
falling edge of TxGVAL
Cleared by software
Cleared by
software
TMRxGIF
TxGTM
Counting enabled on
rising edge of TxG
N + 4
N + 3



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