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PIC18F23K22-E/ML bảng dữ liệu(PDF) 127 Page - Microchip Technology

tên linh kiện PIC18F23K22-E/ML
Giải thích chi tiết về linh kiện  28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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PIC18F23K22-E/ML bảng dữ liệu(HTML) 127 Page - Microchip Technology

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 2010 Microchip Technology Inc.
Preliminary
DS41412C-page 127
PIC18(L)F2X/4XK22
9.7
IPR Registers
The IPR registers contain the individual priority bits for the
peripheral interrupts. Due to the number of peripheral
interrupt sources, there are five Peripheral Interrupt
Priority registers (IPR1, IPR2, IPR3, IPR4 and IPR5).
Using the priority bits requires that the Interrupt Priority
Enable (IPEN) bit be set.
REGISTER 9-14:
IPR1: PERIPHERAL INTERRUPT PRIORITY REGISTER 1
U-0
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
—
ADIP
RC1IP
TX1IP
SSP1IP
CCP1IP
TMR2IP
TMR1IP
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented: Read as ‘0’
bit 6
ADIP: A/D Converter Interrupt Priority bit
1 = High priority
0 = Low priority
bit 5
RC1IP: EUSART1 Receive Interrupt Priority bit
1 = High priority
0 = Low priority
bit 4
TX1IP: EUSART1 Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
bit 3
SSP1IP: Master Synchronous Serial Port 1 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 2
CCP1IP: CCP1 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 1
TMR2IP: TMR2 to PR2 Match Interrupt Priority bit
1 = High priority
0 = Low priority
bit 0
TMR1IP: TMR1 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority



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