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AT90PWM2 bảng dữ liệu(PDF) 161 Page - ATMEL Corporation |
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AT90PWM2 bảng dữ liệu(HTML) 161 Page - ATMEL Corporation |
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161 / 361 page ![]() 161 4317J–AVR–08/10 AT90PWM2/3/2B/3B 16.25 PSC Register Definition Registers are explained for PSC0. They are identical for PSC1. For PSC2 only different registers are described. 16.25.1 PSC 0 Synchro and Output Configuration – PSOC0 16.25.2 PSC 1 Synchro and Output Configuration – PSOC1 16.25.3 PSC 2 Synchro and Output Configuration – PSOC2 • Bit 7 – POS23 : PSCOUT23 Selection (PSC2 only) When this bit is clear, PSCOUT23 outputs the waveform generated by Waveform Generator B. When this bit is set, PSCOUT23 outputs the waveform generated by Waveform Generator A. • Bit 6 – POS22 : PSCOUT22 Selection (PSC2 only) When this bit is clear, PSCOUT22 outputs the waveform generated by Waveform Generator A. When this bit is set, PSCOUT22 outputs the waveform generated by Waveform Generator B. • Bit 5:4 – PSYNCn1:0: Synchronization Out for ADC Selection Select the polarity and signal source for generating a signal which will be sent to the ADC for synchronization. Bit 7 654 3 2 1 0 - - PSYNC01 PSYNC00 - POEN0B - POEN0A PSOC0 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 654 3 2 1 0 - - PSYNC11 PSYNC10 - POEN1B - POEN1A PSOC1 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 654 3 2 1 0 POS23 POS22 PSYNC21 PSYNC20 POEN2D POEN2B POEN2C POEN2A PSOC2 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Table 16-11. Synchronization Source Description in One/Two/Four Ramp Modes PSYNCn1 PSYNCn0 Description 0 0 Send signal on leading edge of PSCOUTn0 (match with OCRnSA) 01 Send signal on trailing edge of PSCOUTn0 (match with OCRnRA or fault/retrigger on part A) 1 0 Send signal on leading edge of PSCOUTn1 (match with OCRnSB) 11 Send signal on trailing edge of PSCOUTn1 (match with OCRnRB or fault/retrigger on part B) |
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