AT90PWM2 datasheet(105/361 Pages) ATMEL

105 / 361 page

105

4317J–AVR–08/10

AT90PWM2/3/2B/3B

Note:

1. The example code assumes that the part specific header file is included.

For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”

instructions must be replaced with instructions that allow access to extended I/O. Typically

“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.

The assembly code example returns the TCNTn value in the r17:r16 register pair.

It is important to notice that accessing 16-bit registers are atomic operations. If an interrupt

occurs between the two instructions accessing the 16-bit register, and the interrupt code

updates the temporary register by accessing the same or any other of the 16-bit Timer Regis-

ters, then the result of the access outside the interrupt will be corrupted. Therefore, when both

the main code and the interrupt code update the temporary register, the main code must disable

the interrupts during the 16-bit access.

TABLE 3.

Assembly Code Examples(1)

...

; Set TCNT

n to 0x01FF

ldi

r17,0x01

ldi

r16,0xFF

out

TCNT

nH,r17

out

TCNT

nL,r16

; Read TCNT

n into r17:r16

r16,TCNT

r17,TCNT

...

C Code Examples(1)

unsigned int

...

/* Set TCNT

n to 0x01FF */

TCNT

n = 0x1FF;

/* Read TCNT

n into i */

i = TCNT

...

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