MC68HC705P9CS datasheet(134/160 Pages) FREESCALE

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Analog-to-Digital Converter (ADC)

Technical Data

MC68HC705P9 — Rev. 4.0

134

Analog-to-Digital Converter (ADC)

MOTOROLA

11.7 I/O Registers

The following registers control and monitor operation of the ADC:

•

ADC status and control register (ADSCR)

•

ADC data register (ADDR)

11.7.1 ADC Status and Control Register

The ADC status and control register (ADSCR) contains a conversion

complete flag and four writable control bits. Writing to ADSCR clears the

conversion complete flag and starts a new conversion sequence.

CCF — Conversion Complete Flag

This read-only bit is automatically set when an analog-to-digital

conversion is complete, and a new result can be read from the ADC

data register. Clear the CCF bit by writing to the ADC status and

control register or by reading the ADC data register. Resets clear the

CCF bit.

1 = Conversion complete

0 = Conversion not complete

ADRC — ADC RC (Oscillator)

This read/write bit turns on the internal RC oscillator to drive the ADC.

If the internal clock frequency (f

OP) is less than 1 MHz, ADRC must be

set. When the RC oscillator is turned on, it requires a time, t

ADRC, to

stabilize, and results can be inaccurate during this time. Resets clear

the ADRC bit.

1 = Internal RC oscillator drives ADC

0 = Internal clock drives ADC

$001E

Bit 7

54321

Bit 0

Read:

CCF

ADRC

ADON

CH2

CH1

CH0

Write:

Reset:

000000

= Unimplemented

Figure 11-3. ADC Status and Control Register (ADSCR)

Freescale Semiconductor, Inc.

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