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PC312XDP512F0CFVR bảng dữ liệu(PDF) 493 Page - Freescale Semiconductor, Inc |
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PC312XDP512F0CFVR bảng dữ liệu(HTML) 493 Page - Freescale Semiconductor, Inc |
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493 / 1348 page ![]() Chapter 11 Serial Communication Interface (S12SCIV5) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 493 11.4 Functional Description This section provides a complete functional description of the SCI block, detailing the operation of the design from the end user perspective in a number of subsections. Figure 11-14 shows the structure of the SCI module. The SCI allows full duplex, asynchronous, serial communication between the CPU and remote devices, including other CPUs. The SCI transmitter and receiver operate independently, although they use the same baud rate generator. The CPU monitors the status of the SCI, writes the data to be transmitted, and processes received data. Figure 11-14. Detailed SCI Block Diagram SCI Data Receive Shift Register SCI Data Register Transmit Shift Register Register Baud Rate Generator SBR12:SBR0 Bus Transmit Control ÷16 Receive and Wakeup Data Format Control Control T8 PF FE NF RDRF IDLE TIE OR TCIE TDRE TC R8 RAF LOOPS RWU RE PE ILT PT WAKE M Clock ILIE RIE RXD RSRC SBK LOOPS TE RSRC IREN Ir_RXD TXD Ir_TXD R16XCLK R32XCLK TNP[1:0] IREN Transmit Encoder Receive Decoder SCRXD SCTXD Infrared Infrared TC TDRE IDLE Active Edge Detect Break Detect RXD BKDFE BERRM[1:0] BKDIE BKDIF RXEDGIE RXEDGIF BERRIE BERRIF SCI Interrupt Request LIN Transmit Collision Detect |
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