PC312XDP512F0CFVR datasheet(438/1348 Pages) FREESCALE

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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)

MC9S12XDP512 Data Sheet, Rev. 2.21

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Read: Anytime

Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1), except bits IDHITx, which are

read-only

The IDHITx indicators are always related to the message in the foreground buffer (RxFG). When a

message gets shifted into the foreground buffer of the receiver FIFO the indicators are updated as well.

10.3.2.13 MSCAN Reserved Register

This register is reserved for factory testing of the MSCAN module and is not available in normal system

operation modes.

Table 10-16. CANIDAC Register Field Descriptions

Field

Description

5:4

IDAM[1:0]

Identiﬁer Acceptance Mode — The CPU sets these ﬂags to deﬁne the identiﬁer acceptance ﬁlter organization

(see Section 10.4.3, “Identiﬁer Acceptance Filter”). Table 10-17 summarizes the different settings. In ﬁlter closed

mode, no message is accepted such that the foreground buffer is never reloaded.

2:0

IDHIT[2:0]

Identiﬁer Acceptance Hit Indicator — The MSCAN sets these ﬂags to indicate an identiﬁer acceptance hit (see

Section 10.4.3, “Identiﬁer Acceptance Filter”). Table 10-18 summarizes the different settings.

Table 10-17. Identiﬁer Acceptance Mode Settings

IDAM1

IDAM0

Identiﬁer Acceptance Mode

Two 32-bit acceptance ﬁlters

Four 16-bit acceptance ﬁlters

Eight 8-bit acceptance ﬁlters

Filter closed

Table 10-18. Identiﬁer Acceptance Hit Indication

IDHIT2

IDHIT1

IDHIT0

Identiﬁer Acceptance Hit

Filter 0 hit

Filter 1 hit

Filter 2 hit

Filter 3 hit

Filter 4 hit

Filter 5 hit

Filter 6 hit

Filter 7 hit

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