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PIC16F685-E/SS bảng dữ liệu(PDF) 301 Page - Microchip Technology |
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PIC16F685-E/SS bảng dữ liệu(HTML) 301 Page - Microchip Technology |
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301 / 306 page  © 2008 Microchip Technology Inc. DS41262E-page 299 PIC16F631/677/685/687/689/690 IOCB (Interrupt-on-Change PORTB) .......................... 70 OPTION_REG (OPTION) ..................................... 37, 83 OSCCON (Oscillator Control) ..................................... 48 OSCTUNE (Oscillator Tuning) .................................... 52 PCON (Power Control Register) ................................. 43 PCON (Power Control) ............................................. 203 PIE1 (Peripheral Interrupt Enable 1)........................... 39 PIE2 (Peripheral Interrupt Enable 2)........................... 40 PIR1 (Peripheral Interrupt Register 1) ........................ 41 PIR2 (Peripheral Interrupt Request 2) ........................ 42 PORTA........................................................................ 59 PORTB........................................................................ 69 PORTC ....................................................................... 76 PSTRCON (Pulse Steering Control) ......................... 146 PWMxCON (Enhanced PWM Control) ..................... 145 RCSTA (Receive Status and Control)....................... 161 Reset Values............................................................. 205 Reset Values (special registers) ............................... 207 Special Function Register Map PIC16F677.......................................................... 28 PIC16F685.................................................... 27, 29 PIC16F687/689................................................... 30 PIC16F690.......................................................... 31 Special Function Registers ......................................... 26 Special Register Summary Bank 0................................................................. 32 Bank 1................................................................. 33 Bank 2................................................................. 34 Bank 3................................................................. 35 SRCON (SR Latch Control) ...................................... 103 SSPCON (Sync Serial Port Control) Register........... 181 SSPMSK (SSP Mask)............................................... 191 SSPSTAT (Sync Serial Port Status) Register........... 180 STATUS...................................................................... 36 T1CON........................................................................ 88 T2CON........................................................................ 92 TRISA (Tri-State PORTA)........................................... 59 TRISB (Tri-State PORTB)........................................... 70 TRISC (Tri-State PORTC) .......................................... 76 TXSTA (Transmit Status and Control) ...................... 160 VRCON (Voltage Reference Control) ....................... 106 WDTCON (Watchdog Timer Control) ....................... 213 WPUA (Weak Pull-Up PORTA) .................................. 62 WPUB (Weak Pull-up PORTB) ................................... 70 Reset................................................................................. 200 Revision History ................................................................ 293 S S (Start) bit ........................................................................ 180 Shoot-through Current ...................................................... 144 Slave Select Synchronization ........................................... 185 Sleep................................................................................. 214 Wake-up.................................................................... 214 Wake-up Using Interrupts ......................................... 214 SMP bit ............................................................................. 180 Software Simulator (MPLAB SIM)..................................... 228 SPBRG ............................................................................. 163 SPBRGH........................................................................... 163 Special Event Trigger........................................................ 111 Special Function Registers ................................................. 26 SPI Mode .................................................................. 179, 185 Associated Registers ................................................ 187 Bus Mode Compatibility ............................................ 187 Effects of a Reset...................................................... 187 Enabling SPI I/O ....................................................... 183 Master Mode ............................................................. 184 Master/Slave Connection ......................................... 183 Serial Clock (SCK pin).............................................. 179 Serial Data In (SDI pin)............................................. 179 Serial Data Out (SDO pin) ........................................ 179 Slave Select.............................................................. 179 Slave Select Synchronization ................................... 185 Sleep Operation........................................................ 187 SPI Clock.................................................................. 184 Typical Connection ................................................... 183 SRCON Register .............................................................. 103 SSP Overview SPI Master/Slave Connection................................... 183 SSP I2C Operation ........................................................... 188 Slave Mode............................................................... 188 SSP Module Clock Synchronization and the CKP Bit ................... 195 SPI Master Mode...................................................... 184 SPI Slave Mode........................................................ 185 SSPBUF ................................................................... 184 SSPSR ..................................................................... 184 SSPCON Register ............................................................ 181 SSPEN bit......................................................................... 181 SSPM bits......................................................................... 181 SSPMSK Register ............................................................ 191 SSPOV bit ........................................................................ 181 SSPSTAT Register ........................................................... 180 STATUS Register ............................................................... 36 Synchronous Serial Port Enable bit (SSPEN) .................. 181 Synchronous Serial Port Mode Select bits (SSPM).......... 181 Synchronous Serial Port. See SSP T T1CON Register ................................................................. 88 T2CON Register ................................................................. 92 Thermal Considerations.................................................... 239 Time-out Sequence .......................................................... 203 Timer0 ................................................................................ 81 Associated Registers.................................................. 83 External Clock ............................................................ 82 Interrupt ...................................................................... 83 Operation.............................................................. 81, 84 Specifications ........................................................... 246 T0CKI ......................................................................... 82 Timer1 ................................................................................ 84 Associated registers ................................................... 89 Asynchronous Counter Mode ..................................... 85 Reading and Writing ........................................... 85 Interrupt ...................................................................... 86 Modes of Operation .................................................... 84 Operation During Sleep .............................................. 86 Oscillator..................................................................... 85 Prescaler .................................................................... 85 Specifications ........................................................... 246 Timer1 Gate Inverting Gate ..................................................... 86 Selecting Source ........................................ 85, 101 Synchronizing COUT w/Timer1 ........................ 101 TMR1H Register......................................................... 84 TMR1L Register ......................................................... 84 Timer2 Associated registers ................................................... 92 Timers Timer1 T1CON ............................................................... 88 Timer2 |
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