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PIC24F16KA102 bảng dữ liệu(PDF) 181 Page - Microchip Technology |
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PIC24F16KA102 bảng dữ liệu(HTML) 181 Page - Microchip Technology |
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181 / 254 page ![]() © 2009 Microchip Technology Inc. Preliminary DS39927B-page 179 PIC24F16KA102 FAMILY 23.0 COMPARATOR MODULE The comparator module provides two dual input comparators. The inputs to the comparator can be configured to use any one of four external analog inputs, as well as a voltage reference input from either the internal band gap reference divided by 2 (VBG/2) or the comparator voltage reference generator. The comparator outputs may be directly connected to the CxOUT pins. When the respective COE equals ‘1’, the I/O pad logic makes the unsynchronized output of the comparator available on the pin. A simplified block diagram of the module is displayed in Figure 23-1. Diagrams of the possible individual comparator configurations are displayed in Figure 23-2. Each comparator has its own control register, CMxCON (Register 23-1), for enabling and configuring its operation. The output and event status of all three comparators is provided in the CMSTAT register (Register 23-2). FIGURE 23-1: COMPARATOR MODULE BLOCK DIAGRAM Note: This data sheet summarizes the features of this group of PIC24F devices. It is not intended to be a comprehensive reference source. For more information on the Comparator module, refer to the “PIC24F Family Reference Manual” , Section 19. “Comparator Module” (DS39710). C1 VIN- VIN+ CXINB CXINC CXINA CXIND CVREF VBG/2 C2 VIN- VIN+ COE C1OUT Pin CPOL Trigger/Interrupt Logic CEVT EVPOL<1:0> COUT Input Select Logic CCH<1:0> CREF COE C2OUT Pin CPOL Trigger/Interrupt Logic CEVT EVPOL<1:0> COUT |
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