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PIC24F16KA102 bảng dữ liệu(PDF) 121 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
Preliminary
DS39927B-page 119
PIC24F16KA102 FAMILY
14.0
INPUT CAPTURE
The input capture module is used to capture a timer
value from one of two selectable time bases upon an
event on an input pin.
The input capture features are quite useful in
applications requiring frequency (Time Period) and
pulse measurement. Figure 14-1 depicts a simplified
block diagram of the input capture module.
The PIC24F16KA102 family devices have one input
capture channel. The input capture module has
multiple operating modes, which are selected via the
IC1CON register. The operating modes include:
• Capture timer value on every falling edge of input
applied at the IC1 pin
• Capture timer value on every rising edge of input
applied at the IC1 pin
• Capture timer value on every 4th rising edge of
input applied at the IC1 pin
• Capture timer value on every 16th rising edge of
input applied at the IC1 pin
• Capture timer value on every rising and every
falling edge of input applied at the IC1 pin
• Device wake-up from capture pin during CPU
Sleep and Idle modes
The input capture module has a four-level FIFO buffer.
The number of capture events required to generate a
CPU interrupt can be selected by the user.
FIGURE 14-1:
INPUT CAPTURE BLOCK DIAGRAM
Note:
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information on Input
Capture, refer to the “PIC24F Family
Reference Manual”
, Section 15. “Input
Capture”
(DS39701).
IC1BUF
IC1 Pin
ICM<2:0> (IC1CON<2:0>)
Mode Select
3
10
Set Flag IC1IF
(in IFSn Register)
TMRy TMRx
Edge Detection Logic
16
16
FIFO
R/W
Logic
ICI<1:0>
ICOV, ICBNE (IC1CON<4:3>)
IC1CON
Interrupt
Logic
System Bus
From 16-Bit Timers
ICTMR
(IC1CON<7>)
Prescaler
Counter
(1, 4, 16)
Clock Synchronizer



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