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PIC16F1824-E/ML bảng dữ liệu(PDF) 120 Page - Microchip Technology |
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PIC16F1824-E/ML bảng dữ liệu(HTML) 120 Page - Microchip Technology |
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120 / 420 page ![]() PIC16F/LF1824/1828 DS41419A-page 120 Preliminary 2010 Microchip Technology Inc. TABLE 11-3: SUMMARY OF REGISTERS ASSOCIATED WITH DATA EEPROM REGISTER 11-6: EECON2: EEPROM CONTROL 2 REGISTER W-0/0 W-0/0 W-0/0 W-0/0 W-0/0 W-0/0 W-0/0 W-0/0 EEPROM Control Register 2 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ S = Bit can only be set x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-0 Data EEPROM Unlock Pattern bits To unlock writes, a 55h must be written first, followed by an AAh, before setting the WR bit of the EECON1 register. The value written to this register is used to unlock the writes. There are specific timing requirements on these writes. Refer to Section 11.2.2 “Writing to the Data EEPROM Memory” for more information. Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page EECON1 EEPGD CFGS LWLO FREE WRERR WREN WR RD 119 EECON2 EEPROM Control Register 2 (not a physical register) 120* EEADRL EEADRL<7:0> 118 EEADRH — EEADRH<6:0 118 EEDATL EEDATL<7:0> 118 EEDATH — — EEDATH<5:0> 118 INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 93 PIE2 OSFIE C2IE C1IE EEIE BCL1IE — — CCP2IE 95 PIR2 OSFIF C2IF C1IF EEIF BCL1IF — — CCP2IF 98 Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by data EEPROM module. * Page provides register information. |
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