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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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ST7713 bảng dữ liệu(PDF) 129 Page - Sitronix Technology Co., Ltd. |
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ST7713 bảng dữ liệu(HTML) 129 Page - Sitronix Technology Co., Ltd. |
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129 / 159 page  ST7713 Ver 1.6 2008-05 129 10.1.36 RDID3 (DCh): Read ID3 Value DCH RDID3 (Read ID2 Value) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 (Code) RDID3 0 ↑ 1 - 1 1 0 1 1 1 0 0 (DCh) 1st Parameter 1 1 ↑ - - - - - - - - - - 2nd Parameter 1 1 ↑ - ID37 ID36 ID35 ID34 ID33 ID32 ID31 ID30 NOTE: “-” Don’t care, can be set to VDDI or DGND level Description -This read byte returns 8-bit LCD module/driver ID. -The 1 st parameter is dummy data -The 2 nd parameter (ID37 to ID30): LCD module/driver ID. NOTE: See command RDDID (04h), 4 th parameter. Register Availability Status Availability Normal Mode On, Idle Mode Off, Sleep Out Yes Normal Mode On, Idle Mode On, Sleep Out Yes Partial Mode On, Idle Mode Off, Sleep Out No Partial Mode On, Idle Mode On, Sleep Out No Sleep In Yes Default Status Default Value Power On Sequence 00h S/W Reset 00h H/W Reset 00h 10.2.1 RGBCTR (B0h): RGB signal control B0H RGBCTR (RGB signal control) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 (Code) RGBCTR 0 ↑ 1 - 1 0 1 1 0 0 0 0 (B0h) 1st Parameter 1 ↑ 1 - 0 0 DISSW ICM DP EP HSP VSP NOTE: “-“ Don’t care Description -Set the operation status on the RGB interface. The setting becomes effective as soon as the command is received. -ICM: GRAM Write/Read frequency and data input select on the RGB interface ICM Write/ Read frequency and input data select Write cycle Read cycle Data input 0 PCLK PCLK D[17:0] 1 SCL Internal oscillator SDA Symbol Name Clock polarity set for RGB Interface DP PCLK polarity set ‘1’ = data fetched at the falling edge ‘0’ = data fetched at the rising edge EP Enable polarity set ‘1’ = Low enable for RGB interface ‘0’ = High enable for RGB interface HSP Hsync polarity set ‘1’ = High level sync clock ‘0’ = Low level sync clock VSP Vsync polarity set ‘1’ = High level sync clock ‘0’ = Low level sync clock DISSW Disable S/W ‘1’ = Disable S/W control ‘0’ = Enable S/W control Default Status Default Value ICM DP/EP/HSP/VSP Power On Sequence 0d 0d/0d/0d/0d S/W Reset 0d 0d/0d/0d/0d H/W Reset 0d 0d/0d/0d/0d |
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