ATmega325P datasheet(234/364 Pages) ATMEL

tên linh kiện	ATmega325P

Giải thích chi tiết về linh kiện	8-bit Microcontroller with 32K Bytes In-System Programmable Flash

PDF	364 Pages

Scroll/Zoom	100%

nhà sản xuất	ATMEL [ATMEL Corporation]

Trang chủ	http://www.atmel.com

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234 / 364 page

234

8023F–AVR–07/09

ATmega325P/3250P

Figure 23-3. General Port Pin Schematic Diagram

23.5.2

Scanning the RESET Pin

The RESET pin accepts 5V active low logic for standard reset operation, and 12V active high

logic for High Voltage Parallel programming. An observe-only cell as shown in Figure 23-4 is

inserted both for the 5V reset signal; RSTT, and the 12V reset signal; RSTHV.

Figure 23-4. Observe-only Cell

CLK

RPx

RDx

WDx

PUD

SYNCHRONIZER

WDx:

WRITE DDRx

WRx:

WRITE PORTx

RRx:

READ PORTx REGISTER

WPx:

WRITE PINx REGISTER

PUD:

PULLUP DISABLE

CLK

I/O CLOCK

RDx:

READ DDRx

RESET

CLR

DDxn

PINxn

SLEEP

SLEEP:

SLEEP CONTROL

Pxn

I/O

See Boundary-scan

Description for Details!

PUExn

OCxn

ODxn

IDxn

PUExn:

PULLUP ENABLE for pin Pxn

OCxn:

OUTPUT CONTROL for pin Pxn

ODxn:

OUTPUT DATA to pin Pxn

IDxn:

INPUT DATA from pin Pxn

RPx:

READ PORTx PIN

RRx

RESET

CLR

PORTxn

WPx

WRx

From

Cell

ClockDR

ShiftDR

Cell

From System Pin

To System Logic

FF1

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