ATmega169P datasheet(264/393 Pages) ATMEL

264 / 393 page

264

8018N–AVR–08/09

ATmega169P

25.5.2

Scanning the RESET Pin

The RESET pin accepts 5V active low logic for standard reset operation, and 12V active high

logic for High Voltage Parallel programming. An observe-only cell as shown in Figure 25-5 is

inserted both for the 5V reset signal; RSTT, and the 12V reset signal; RSTHV.

Figure 25-5. Observe-only Cell

25.5.3

Scanning the Clock Pins

The AVR devices have many clock options selectable by fuses. These are: Internal RC Oscilla-

tor, External Clock, (High Frequency) Crystal Oscillator, Low-frequency Crystal Oscillator, and

Ceramic Resonator.

Figure 25-6 shows how each Oscillator with external connection is supported in the scan chain.

The Enable signal is supported with a general Boundary-scan cell, while the Oscillator/clock out-

put is attached to an observe-only cell. In addition to the main clock, the timer Oscillator is

scanned in the same way. The output from the internal RC Oscillator is not scanned, as this

Oscillator does not have external connections.

Figure 25-6. Boundary-scan Cells for Oscillators and Clock Options

From

Cell

ClockDR

ShiftDR

Cell

From System Pin

To System Logic

FF1

From

Cell

ClockDR

ShiftDR

Cell

To System Logic

FF1

From

Cell

ClockDR

UpdateDR

ShiftDR

Cell

EXTEST

From Digital Logic

XTAL1/TOSC1

XTAL2/TOSC2

Oscillator

ENABLE

OUTPUT

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