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ATtiny88 bảng dữ liệu(PDF) 159 Page - ATMEL Corporation |
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ATtiny88 bảng dữ liệu(HTML) 159 Page - ATMEL Corporation |
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159 / 266 page ![]() 159 8008C–AVR–03/09 ATtiny48/88 Figure 17-1. Analog to Digital Converter Block Schematic Operation 17.3 Operation In order to be able to use the ADC the Power Reduction bit, PRADC, in the Power Reduction Register must be disabled. This is done by clearing the PRADC bit. See “PRR – Power Reduc- tion Register” on page 37 for more details. The ADC converts an analog input voltage to a 10-bit digital value through successive approxi- mation. The minimum value represents GND and the maximum value represents the reference voltage. The ADC voltage reference may be selected by writing the REFS0 bit in the ADMUX register. Alternatives are the V CC supply pin and the internal 1.1V voltage reference. ADC CONVERSION COMPLETE IRQ 8-BIT DATA BUS 15 0 ADC MULTIPLEXER SELECT (ADMUX) ADC CTRL. & STATUS REGISTER (ADCSRA) ADC DATA REGISTER (ADCH/ADCL) CONVERSION LOGIC 10-BIT DAC + - SAMPLE & HOLD COMPARATOR INTERNAL 1.1V REFERENCE MUX DECODER AVCC ADC7 ADC6 ADC5 ADC4 ADC3 ADC2 ADC1 ADC0 ADC MULTIPLEXER OUTPUT BANDGAP REFERENCE PRESCALER GND INPUT MUX TEMPERATURE SENSOR |
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