ATmega32U2 datasheet(216/314 Pages) ATMEL

tên linh kiện	ATmega32U2

Giải thích chi tiết về linh kiện	8-bit Microcontroller with 8/16/32K Bytes of ISP Flash and USB Controller

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216

7799B–AVR–07/09

ATmega8U2/16U2/32U2

21.18.12 UECFG1X – USB Endpoint Configuration 1 Register

• Bit 7 – Res: Reserved

This bit is reserved and will always read as zero.

• Bit 6:4 – EPSIZE[2:0]: Endpoint Size Bits

These bits configure the endpoint size for the selected endpoint as shown in Table 21-3.

• Bits 3:2 – EPBK[1:0]: Endpoint Bank Bits

These bits configure the number of banks that is allocated to the selected endpoint as shown in

Table 21-3.

• Bit 1 – ALLOC: Endpoint Allocation Bit

Writing this to one allows to allocate the specified amount of memory (endpoint size x number of

banks) for the selected endpoint. Writing this bit to zero allows to free the previously allocated

memory for the selected endpoint.

See Section 21.6, page 198 for more details.

• Bit 0 – Res: Reserved

This bit is reserved and will always read as zero.

Bit

654

(0xED)

EPSIZE[2:0]

EPBK1:0

ALLOC

UECFG1X

Read/Write

R/W

Initial Value

Table 21-3.

EPSIZE[2:0] Bits Settings

EPSIZE2

EPSIZE1

EPSIZE0

Endpoint Size

000

8 Bytes

001

16 Bytes

010

32 Bytes

011

64 Bytes

100

Reserved.

101

110

111

Table 21-4.

EPBK[1:0] Bits Settings

EPBK1

EPBK0

Endpoint Size

One Bank

Two Banks

Reserved

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