ATmega162 datasheet(188/324 Pages) ATMEL

188 / 324 page

188

2513K–AVR–07/09

ATmega162/V

• Bit 4 – RXEN: Receiver Enable

Writing this bit to one enables the USART Receiver. The Receiver will override normal port oper-

ation for the RxD pin when enabled. Disabling the Receiver will flush the receive buffer

invalidating the FE, DOR and UPE Flags.

• Bit 3 – TXEN: Transmitter Enable

Writing this bit to one enables the USART Transmitter. The Transmitter will override normal port

operation for the TxD pin when enabled. The disabling of the Transmitter (writing TXEN to zero)

will not become effective until ongoing and pending transmissions are completed, i.e., when the

Transmit Shift Register and Transmit Buffer Register do not contain data to be transmitted.

When disabled, the Transmitter will no longer override the TxD port.

• Bit 2 – UCSZ2: Character Size

The UCSZ2 bits combined with the UCSZ1:0 bit in UCSRC sets the number of data bits (charac-

ter size) in a frame the Receiver and Transmitter use.

• Bit 1 – RXB8: Receive Data Bit 8

RXB8 is the ninth data bit of the received character when operating with serial frames with nine

data bits. Must be read before reading the low bits from UDR.

• Bit 0 – TXB8: Transmit Data Bit 8

TXB8 is the 9th data bit in the character to be transmitted when operating with serial frames with

9 data bits. Must be written before writing the low bits to UDR.

ATmega162 bảng dữ liệu(PDF) 188 Page - ATMEL Corporation