ATmega16 datasheet(259/357 Pages) ATMEL

259 / 357 page

259

2466S–AVR–05/09

ATmega16(L)

Memory

Programming

Program And Data

Memory Lock Bits

The ATmega16 provides six Lock bits which can be left unprogrammed (“1”) or can be pro-

grammed (“0”) to obtain the additional features listed in Table 104. The Lock bits can only be

erased to “1” with the Chip Erase command.

Note:

1. “1” means unprogrammed, “0” means programmed

Table 103. Lock Bit Byte

(1)

Lock Bit Byte

Bit No.

Description

Default Value

–

1 (unprogrammed)

–

1 (unprogrammed)

BLB12

Boot Lock bit

1 (unprogrammed)

BLB11

Boot Lock bit

1 (unprogrammed)

BLB02

Boot Lock bit

1 (unprogrammed)

BLB01

Boot Lock bit

1 (unprogrammed)

LB2

Lock bit

1 (unprogrammed)

LB1

Lock bit

1 (unprogrammed)

Table 104. Lock Bit Protection Modes

Memory Lock Bits(2)

Protection Type

LB Mode

LB2

LB1

No memory lock features enabled.

Further programming of the Flash and EEPROM is

disabled in Parallel and SPI/JTAG Serial Programming

mode. The Fuse bits are locked in both Serial and Parallel

Programming mode.(1)

Further programming and verification of the Flash and

EEPROM is disabled in Parallel and SPI/JTAG Serial

Programming mode. The Fuse bits are locked in both

Serial and Parallel Programming mode.(1)

BLB0 Mode

BLB02

BLB01

No restrictions for SPM or LPM accessing the Application

section.

SPM is not allowed to write to the Application section.

SPM is not allowed to write to the Application section, and

LPM executing from the Boot Loader section is not

allowed to read from the Application section. If interrupt

vectors are placed in the Boot Loader section, interrupts

are disabled while executing from the Application section.

LPM executing from the Boot Loader section is not

allowed to read from the Application section. If interrupt

vectors are placed in the Boot Loader section, interrupts

are disabled while executing from the Application section.

BLB1 Mode

BLB12

BLB11

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