ATmega16 datasheet(129/357 Pages) ATMEL

129 / 357 page

129

2466S–AVR–05/09

ATmega16(L)

When OC2 is connected to the pin, the function of the COM21:0 bits depends on the WGM21:0

bit setting. Table 51 shows the COM21:0 bit functionality when the WGM21:0 bits are set to a

normal or CTC mode (non-PWM).

Table 52 shows the COM21:0 bit functionality when the WGM21:0 bits are set to fast PWM

mode.

Note:

1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the compare

match is ignored, but the set or clear is done at BOTTOM. See “Fast PWM Mode” on page 123

for more details.

Table 53 shows the COM21:0 bit functionality when the WGM21:0 bits are set to phase correct

PWM mode

Note:

1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the compare

match is ignored, but the set or clear is done at TOP. See “Phase Correct PWM Mode” on page

124 for more details.

Table 51. Compare Output Mode, non-PWM Mode

COM21

COM20

Description

Normal port operation, OC2 disconnected.

Toggle OC2 on compare match

Clear OC2 on compare match

Set OC2 on compare match

Table 52. Compare Output Mode, Fast PWM Mode(1)

COM21

COM20

Description

Normal port operation, OC2 disconnected.

Reserved

Clear OC2 on compare match, set OC2 at BOTTOM,

(non-inverting mode)

Set OC2 on compare match, clear OC2 at BOTTOM,

(inverting mode)

Table 53. Compare Output Mode, Phase Correct PWM Mode

(1)

COM21

COM20

Description

Normal port operation, OC2 disconnected.

Reserved

Clear OC2 on compare match when up-counting. Set OC2 on compare

match when downcounting.

Set OC2 on compare match when up-counting. Clear OC2 on compare

match when downcounting.

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